From 303980c502c721f13d65e7087be6c0758df65044 Mon Sep 17 00:00:00 2001
From: Sadik Armagan <sadik.armagan@arm.com>
Date: Fri, 17 Apr 2020 12:45:14 +0100
Subject: IVGCVSW-4668 Add TENSOR_QUANT8_ASYMM_SIGNED data type support to
 CpuRef operators

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I094125ba80699cc3cf5226bda6662a54e6caa988
---
 src/backends/reference/workloads/Pad.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'src/backends/reference/workloads/Pad.cpp')

diff --git a/src/backends/reference/workloads/Pad.cpp b/src/backends/reference/workloads/Pad.cpp
index ffdd469609..1b634145fc 100644
--- a/src/backends/reference/workloads/Pad.cpp
+++ b/src/backends/reference/workloads/Pad.cpp
@@ -177,6 +177,12 @@ template void Pad<uint8_t>(const TensorInfo& inputInfo,
                            const uint8_t* inputData,
                            uint8_t* outData,
                            const float padValue);
+template void Pad<int8_t>(const TensorInfo& inputInfo,
+                          const TensorInfo& outputInfo,
+                          std::vector<std::pair<unsigned int, unsigned int>> m_PadList,
+                          const int8_t* inputData,
+                          int8_t* outData,
+                          const float padValue);
 template void Pad<int16_t>(const TensorInfo& inputInfo,
                            const TensorInfo& outputInfo,
                            std::vector<std::pair<unsigned int, unsigned int>> m_PadList,
-- 
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