From bc67cef3e3dc9e7fe9c4331495009eda48c89527 Mon Sep 17 00:00:00 2001
From: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Date: Thu, 31 Jan 2019 15:31:54 +0000
Subject: IVGCVSW-2557 Ref Workload Implementation for Detection PostProcess

 * implementation of DetectionPostProcessQueueDescriptor validate
 * add Uint8ToFloat32Workload
 * add implementation of Detection PostProcess functionalities
 * add ref workload implemenentation for float and uint8
 * add layer support for Detection PostProcess in ref
 * unit tests

Change-Id: I650461f49edbb3c533d68ef8700377af51bc3592
---
 src/backends/reference/RefLayerSupport.cpp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'src/backends/reference/RefLayerSupport.cpp')

diff --git a/src/backends/reference/RefLayerSupport.cpp b/src/backends/reference/RefLayerSupport.cpp
index 78e44bd6a3..4b32a8938d 100644
--- a/src/backends/reference/RefLayerSupport.cpp
+++ b/src/backends/reference/RefLayerSupport.cpp
@@ -203,6 +203,18 @@ bool RefLayerSupport::IsDepthwiseConvolutionSupported(const TensorInfo& input,
                                      &TrueFunc<>);
 }
 
+bool RefLayerSupport::IsDetectionPostProcessSupported(const armnn::TensorInfo& input0,
+                                                      const armnn::TensorInfo& input1,
+                                                      const armnn::DetectionPostProcessDescriptor& descriptor,
+                                                      armnn::Optional<std::string&> reasonIfUnsupported) const
+{
+    ignore_unused(input1);
+    return IsSupportedForDataTypeRef(reasonIfUnsupported,
+                                     input0.GetDataType(),
+                                     &TrueFunc<>,
+                                     &TrueFunc<>);
+}
+
 bool RefLayerSupport::IsDivisionSupported(const TensorInfo& input0,
                                           const TensorInfo& input1,
                                           const TensorInfo& output,
-- 
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