From a2747487fbe7eb6d9f5357c6d16c32355ed6e01c Mon Sep 17 00:00:00 2001 From: Sadik Armagan Date: Tue, 9 Feb 2021 10:28:54 +0000 Subject: MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support' * Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8 --- src/backends/neon/workloads/CMakeLists.txt | 2 + src/backends/neon/workloads/NeonReduceWorkload.cpp | 66 ++++++++++++++++++++++ src/backends/neon/workloads/NeonReduceWorkload.hpp | 30 ++++++++++ src/backends/neon/workloads/NeonWorkloads.hpp | 1 + 4 files changed, 99 insertions(+) create mode 100644 src/backends/neon/workloads/NeonReduceWorkload.cpp create mode 100644 src/backends/neon/workloads/NeonReduceWorkload.hpp (limited to 'src/backends/neon/workloads') diff --git a/src/backends/neon/workloads/CMakeLists.txt b/src/backends/neon/workloads/CMakeLists.txt index f1a723b324..7c2b185ec3 100644 --- a/src/backends/neon/workloads/CMakeLists.txt +++ b/src/backends/neon/workloads/CMakeLists.txt @@ -93,6 +93,8 @@ list(APPEND armnnNeonBackendWorkloads_sources NeonQuantizeWorkload.cpp NeonQuantizeWorkload.hpp NeonRankWorkload.hpp + NeonReduceWorkload.cpp + NeonReduceWorkload.hpp NeonReshapeWorkload.cpp NeonReshapeWorkload.hpp NeonResizeWorkload.cpp diff --git a/src/backends/neon/workloads/NeonReduceWorkload.cpp b/src/backends/neon/workloads/NeonReduceWorkload.cpp new file mode 100644 index 0000000000..0e1b46a3a1 --- /dev/null +++ b/src/backends/neon/workloads/NeonReduceWorkload.cpp @@ -0,0 +1,66 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonReduceWorkload.hpp" + +#include +#include + +#include + +#include "NeonWorkloadUtils.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +arm_compute::Status NeonReduceWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const ReduceDescriptor& desc) +{ + const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output); + if (!desc.m_vAxis.empty() && desc.m_vAxis.size() > 1) + { + return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, + "NeonReduceWorkload: Reduction is supported only on 1 axis."); + } + + arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(), + input.GetNumDimensions(), + desc.m_vAxis); + + return arm_compute::NEReductionOperation::validate(&aclInputInfo, + &aclOutputInfo, + static_cast(coords[0]), + ConvertReductionOperationToAcl(desc), + desc.m_KeepDims); +} + +NeonReduceWorkload::NeonReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info) + : BaseWorkload(descriptor, info) +{ + m_Data.ValidateInputsOutputs("NeonReduceWorkload", 1, 1); + + arm_compute::ITensor& input = static_cast(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ITensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); + + arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(input.info()->num_dimensions(), + info.m_InputTensorInfos[0].GetNumDimensions(), + m_Data.m_Parameters.m_vAxis); + m_Layer.configure(&input, + &output, + static_cast(coords[0]), + ConvertReductionOperationToAcl(m_Data.m_Parameters), + m_Data.m_Parameters.m_KeepDims); +} + +void NeonReduceWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonReduceWorkload_Execute"); + m_Layer.run(); +} + +} //namespace armnn diff --git a/src/backends/neon/workloads/NeonReduceWorkload.hpp b/src/backends/neon/workloads/NeonReduceWorkload.hpp new file mode 100644 index 0000000000..0472091fbf --- /dev/null +++ b/src/backends/neon/workloads/NeonReduceWorkload.hpp @@ -0,0 +1,30 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include + +#include + +namespace armnn +{ + +arm_compute::Status NeonReduceWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const ReduceDescriptor& desc); + +class NeonReduceWorkload : public BaseWorkload +{ +public: + NeonReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info); + + void Execute() const override; + +private: + mutable arm_compute::NEReductionOperation m_Layer; +}; + +} //namespace armnn diff --git a/src/backends/neon/workloads/NeonWorkloads.hpp b/src/backends/neon/workloads/NeonWorkloads.hpp index 949100d50a..4eb526a04d 100644 --- a/src/backends/neon/workloads/NeonWorkloads.hpp +++ b/src/backends/neon/workloads/NeonWorkloads.hpp @@ -49,6 +49,7 @@ #include "NeonQuantizedLstmWorkload.hpp" #include "NeonQuantizeWorkload.hpp" #include "NeonRankWorkload.hpp" +#include "NeonReduceWorkload.hpp" #include "NeonReshapeWorkload.hpp" #include "NeonResizeWorkload.hpp" #include "NeonRsqrtWorkload.hpp" -- cgit v1.2.1