From b4ef16334900af33bf4321f28c90f62bf32238cd Mon Sep 17 00:00:00 2001 From: Colm Donelan Date: Thu, 1 Feb 2024 15:00:43 +0000 Subject: IVGCVSW-7854 Remove/rewrite asserts in the backends. * Identify usages of ARMNN_ASSERT that should be proper exceptions. * Change ARMNN_ASSERT in Doctests to CHECK. * Verify any remaining assertions are reasonable. Signed-off-by: Colm Donelan Change-Id: Ifd1f2a5a4bb60135e8654305035ec70e09c4dc2d --- src/backends/cl/workloads/ClChannelShuffleWorkload.cpp | 6 +++--- src/backends/cl/workloads/ClConstantWorkload.cpp | 7 +++---- src/backends/cl/workloads/ClConvolution2dWorkload.cpp | 5 +++-- src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp | 4 +--- src/backends/cl/workloads/ClFullyConnectedWorkload.cpp | 6 ++++-- src/backends/cl/workloads/ClGatherNdWorkload.cpp | 4 +--- src/backends/cl/workloads/ClSqrtWorkload.cpp | 7 +++++-- src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp | 9 ++++++--- src/backends/cl/workloads/ClWorkloadUtils.hpp | 5 ++--- 9 files changed, 28 insertions(+), 25 deletions(-) (limited to 'src/backends/cl/workloads') diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp index 9ce05713b0..0e10b37de2 100644 --- a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2021-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -80,8 +80,8 @@ ClChannelShuffleWorkload::ClChannelShuffleWorkload(const ChannelShuffleQueueDesc aclDataLayout = ConvertDataLayout(armnn::DataLayout::NHWC); break; default: - ARMNN_ASSERT_MSG(false, "Unsupported axis"); - break; + throw InvalidArgumentException("Value for axis: " + std::to_string(descriptor.m_Parameters.m_Axis) + + " is not valid"); } input.info()->set_data_layout(aclDataLayout); output.info()->set_data_layout(aclDataLayout); diff --git a/src/backends/cl/workloads/ClConstantWorkload.cpp b/src/backends/cl/workloads/ClConstantWorkload.cpp index bbf6476c0a..619c0f8a11 100644 --- a/src/backends/cl/workloads/ClConstantWorkload.cpp +++ b/src/backends/cl/workloads/ClConstantWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017-2018,2020-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017-2018,2020-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -61,7 +61,7 @@ void ClConstantWorkload::Execute() const { const ConstantQueueDescriptor& data = this->m_Data; - ARMNN_ASSERT(data.m_LayerOutput != nullptr); + ARMNN_THROW_INVALIDARG_MSG_IF_FALSE(data.m_LayerOutput, "Output tensor handle is null."); arm_compute::CLTensor& output = static_cast(data.m_Outputs[0])->GetTensor(); arm_compute::DataType computeDataType = static_cast(data.m_Outputs[0])->GetDataType(); @@ -105,8 +105,7 @@ void ClConstantWorkload::Execute() const } default: { - ARMNN_ASSERT_MSG(false, "Unknown data type"); - break; + throw InvalidArgumentException("Unknown data type."); } } diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp index 2fc174cfc2..7ae09e3eef 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -99,7 +99,8 @@ ClConvolution2dWorkload::ClConvolution2dWorkload(const Convolution2dQueueDescrip arm_compute::ICLTensor& bias = static_cast(m_Data.m_Inputs[2])->GetTensor(); bias.info()->set_are_values_constant(info.m_InputTensorInfos[2].IsConstant()); // We assume here that NeonConvolution2dWorkloadValidate has been called before the constructor. - ARMNN_ASSERT(info.m_InputTensorInfos[2].IsConstant() == true); + ARMNN_THROW_INVALIDARG_MSG_IF_FALSE(info.m_InputTensorInfos[2].IsConstant() == true, + "The bias tensor must be constant."); m_BiasProxy = std::make_unique(&bias); } diff --git a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp index e5ee9b9e06..088814b8c9 100644 --- a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp +++ b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -140,7 +140,6 @@ ClDepthwiseConvolutionWorkload::ClDepthwiseConvolutionWorkload( activationInfo, aclDilationInfo); } - ARMNN_ASSERT(m_DepthwiseConvolutionLayer); // Add details for profiling output WorkloadInfo detailsInfo; @@ -158,7 +157,6 @@ ClDepthwiseConvolutionWorkload::ClDepthwiseConvolutionWorkload( void ClDepthwiseConvolutionWorkload::Execute() const { ARMNN_SCOPED_PROFILING_EVENT_CL_NAME_GUID("ClDepthwiseConvolutionWorkload_Execute"); - ARMNN_ASSERT(m_DepthwiseConvolutionLayer); RunClFunction(*m_DepthwiseConvolutionLayer, CHECK_LOCATION()); } diff --git a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp index 959f430712..0b6606f360 100644 --- a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp +++ b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017-2018,2020-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017-2018,2020-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,9 @@ arm_compute::Status ClFullyConnectedWorkloadValidate(const TensorInfo& input, arm_compute::TensorInfo* optionalAclBiases = nullptr; if (descriptor.m_BiasEnabled) { - ARMNN_ASSERT(biases.has_value()); + ARMNN_THROW_INVALIDARG_MSG_IF_FALSE( + biases.has_value(), + "ClFullyConnectedWorkload: Bias was enabled in the descriptor but no value was supplied."); aclBiases = BuildArmComputeTensorInfo(biases.value()); aclBiases.set_are_values_constant(biases.value().IsConstant()); optionalAclBiases = &aclBiases; diff --git a/src/backends/cl/workloads/ClGatherNdWorkload.cpp b/src/backends/cl/workloads/ClGatherNdWorkload.cpp index 1351f9685f..4e9dd7526f 100644 --- a/src/backends/cl/workloads/ClGatherNdWorkload.cpp +++ b/src/backends/cl/workloads/ClGatherNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -142,8 +142,6 @@ ClGatherNdWorkload::ClGatherNdWorkload(const GatherNdQueueDescriptor& descriptor flattenedCoeff_Info.SetShape({ keyIndices["ND"] }); BuildArmComputeTensor(m_FlattenedCoeff, flattenedCoeff_Info); armcomputetensorutils::InitialiseArmComputeTensorEmpty(m_FlattenedCoeff); - ARMNN_ASSERT_MSG(indicesInfo.GetDataType() == DataType::Signed32, - "flattenedCoeff must be same data type as m_FlattenedCoeff"); CopyArmComputeClTensorData(m_FlattenedCoeff, flattenedCoeff.data()); // Prepare the tensor to store the output of the multiplication diff --git a/src/backends/cl/workloads/ClSqrtWorkload.cpp b/src/backends/cl/workloads/ClSqrtWorkload.cpp index e36adf6d4c..d41584e6d6 100644 --- a/src/backends/cl/workloads/ClSqrtWorkload.cpp +++ b/src/backends/cl/workloads/ClSqrtWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -34,7 +34,10 @@ ClSqrtWorkload::ClSqrtWorkload(const ElementwiseUnaryQueueDescriptor& descriptor const arm_compute::CLCompileContext& clCompileContext) : ClBaseWorkload(descriptor, info) { - ARMNN_ASSERT(descriptor.m_Parameters.m_Operation == UnaryOperation::Sqrt); + if (descriptor.m_Parameters.m_Operation != UnaryOperation::Sqrt) + { + throw InvalidArgumentException("ClSqrtWorkload: The descriptor does not indicate a Sqrt operation."); + } // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSqrtWorkload_Construct", diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp index d3eeadeb31..c3fafd4784 100644 --- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2019-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -38,8 +38,11 @@ arm_compute::Status ClTransposeConvolution2dWorkloadValidate(const TensorInfo& i if (descriptor.m_BiasEnabled) { - ARMNN_ASSERT(biases.has_value()); - + if (!biases.has_value()) + { + return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, + "ArmNN ClTransposeConv2dWorkload has empty bias value."}; + } aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout); optionalAclBiasesInfo = &aclBiasesInfo; } diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp index 4b491e3cec..78b09b062d 100644 --- a/src/backends/cl/workloads/ClWorkloadUtils.hpp +++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017-2024 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once @@ -124,8 +124,7 @@ inline auto SetClSliceData(const std::vector& m_begin, inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor, const ConstTensorHandle* handle) { - ARMNN_ASSERT(handle); - + ARMNN_THROW_INVALIDARG_MSG_IF_FALSE(handle, "Null tensor handle passed to InitializeArmComputeTensorData."); armcomputetensorutils::InitialiseArmComputeTensorEmpty(clTensor); switch(handle->GetTensorInfo().GetDataType()) { -- cgit v1.2.1