From 1222dbd3ddc4e819f8d1b204535bfd222cd1eadd Mon Sep 17 00:00:00 2001 From: Teresa Charlin Date: Thu, 2 Sep 2021 13:58:52 +0100 Subject: IVGCVSW-3706 Add Channel Shuffle Workload to GpuAcc backend Signed-off-by: Teresa Charlin Change-Id: Ic37fc49a97a5ca570a23bc415d15ee3841534336 --- src/backends/cl/workloads/CMakeLists.txt | 2 + .../cl/workloads/ClChannelShuffleWorkload.cpp | 98 ++++++++++++++++++++++ .../cl/workloads/ClChannelShuffleWorkload.hpp | 32 +++++++ src/backends/cl/workloads/ClWorkloads.hpp | 1 + 4 files changed, 133 insertions(+) create mode 100644 src/backends/cl/workloads/ClChannelShuffleWorkload.cpp create mode 100644 src/backends/cl/workloads/ClChannelShuffleWorkload.hpp (limited to 'src/backends/cl/workloads') diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index a351f73aa6..93ae678f98 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -18,6 +18,8 @@ list(APPEND armnnClBackendWorkloads_sources ClBatchToSpaceNdWorkload.hpp ClCastWorkload.cpp ClCastWorkload.hpp + ClChannelShuffleWorkload.cpp + ClChannelShuffleWorkload.hpp ClComparisonWorkload.cpp ClComparisonWorkload.hpp ClConcatWorkload.cpp diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp new file mode 100644 index 0000000000..751056a9a0 --- /dev/null +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp @@ -0,0 +1,98 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClChannelShuffleWorkload.hpp" +#include "ClWorkloadUtils.hpp" + +#include + +#include + +#include + +using namespace armnn::armcomputetensorutils; + +namespace armnn +{ + +arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, + const TensorInfo& output, + const ChannelShuffleDescriptor& descriptor) +{ + arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input); + arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + // In Arm NN and in NNAPI, channel shuffle implementation is datalayout agnostic and it has axis as a parameter. + // The channel shuffle Implementation for Neon is dependent on datalayout and does not have axis as a parameter, + // it only supports channel shuffle for 4D tensors in dimension C (1 or 3). + arm_compute::DataLayout aclDataLayout; + if (input.GetNumDimensions() == 4) + { + switch (descriptor.m_Axis) + { + case 1: + aclDataLayout = ConvertDataLayout(armnn::DataLayout::NCHW); + break; + case 3: + aclDataLayout = ConvertDataLayout(armnn::DataLayout::NHWC); + break; + default: + return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported axis"}; + } + aclInputInfo.set_data_layout(aclDataLayout); + aclOutputInfo.set_data_layout(aclDataLayout); + return arm_compute::CLChannelShuffleLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_NumGroups); + } + else + { + return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported number of dimensions"}; + } +} + +ClChannelShuffleWorkload::ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext) + : BaseWorkload(descriptor, info) +{ + // Report Profiling Details + ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClChannelShufflenWorkload_Construct", + descriptor.m_Parameters, + info, + this->GetGuid()); + + m_Data.ValidateInputsOutputs("ClChannelShuffleWorkload", 1, 1); + + arm_compute::ICLTensor& input = PolymorphicDowncast(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = PolymorphicDowncast(m_Data.m_Outputs[0])->GetTensor(); + + // In Arm NN and in NNAPI, channel shuffle implementation is datalayout agnostic and it has axis as a parameter. + // The channel shuffle Implementation for Neon is dependent on datalayout and does not have axis as a parameter, + // it only supports channel shuffle for 4D tensors in dimension C (1 or 3). + arm_compute::DataLayout aclDataLayout; + switch (descriptor.m_Parameters.m_Axis) + { + case 1: + aclDataLayout = ConvertDataLayout(armnn::DataLayout::NCHW); + break; + case 3: + aclDataLayout = ConvertDataLayout(armnn::DataLayout::NHWC); + break; + default: + ARMNN_ASSERT_MSG(false, "Unsupported axis"); + break; + } + input.info()->set_data_layout(aclDataLayout); + output.info()->set_data_layout(aclDataLayout); + + m_ChannelShuffleLayer.configure(clCompileContext, &input, &output, descriptor.m_Parameters.m_NumGroups); +} + +void ClChannelShuffleWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL_GUID("ClChannelShuffleWorkload_Execute", this->GetGuid()); + RunClFunction(m_ChannelShuffleLayer, CHECK_LOCATION()); +} + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp new file mode 100644 index 0000000000..5ef84e6a1e --- /dev/null +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp @@ -0,0 +1,32 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include + +#include +#include + +namespace armnn +{ + +arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, + const TensorInfo& output, + const ChannelShuffleDescriptor& descriptor); + +class ClChannelShuffleWorkload : public BaseWorkload +{ +public: + ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext); + virtual void Execute() const override; + +private: + mutable arm_compute::CLChannelShuffleLayer m_ChannelShuffleLayer; +}; + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index 88d1c1ba93..3e0984eddf 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -13,6 +13,7 @@ #include "ClBatchNormalizationFloatWorkload.hpp" #include "ClBatchToSpaceNdWorkload.hpp" #include "ClCastWorkload.hpp" +#include "ClChannelShuffleWorkload.hpp" #include "ClConvolution2dWorkload.hpp" #include "ClDepthToSpaceWorkload.hpp" #include "ClDepthwiseConvolutionWorkload.hpp" -- cgit v1.2.1