From ec5f7d13582d1e477dc3473223b503388092a352 Mon Sep 17 00:00:00 2001
From: Teresa Charlin <teresa.charlinreyes@arm.com>
Date: Fri, 22 Oct 2021 17:15:00 +0100
Subject: IVGCVSW-6170 Add CpuAcc Conv3d Workload

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I3a5bfef5a0085d172fd3689e67f25af909ace2ee
---
 src/backends/backendsCommon/test/layerTests/Conv3dTestImpl.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'src/backends/backendsCommon/test/layerTests')

diff --git a/src/backends/backendsCommon/test/layerTests/Conv3dTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/Conv3dTestImpl.cpp
index 1406ab039b..a592ea3f31 100644
--- a/src/backends/backendsCommon/test/layerTests/Conv3dTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/Conv3dTestImpl.cpp
@@ -89,6 +89,11 @@ void SetScaleOffset(float& qScale, int32_t& qOffset)
             break;
         }
         case armnn::DataType::QAsymmS8:
+        {
+            qScale = 0.1f;
+            qOffset = 64;
+            break;
+        }
         case armnn::DataType::QSymmS16:
         {
             qScale = 0.1f;
@@ -100,7 +105,7 @@ void SetScaleOffset(float& qScale, int32_t& qOffset)
         case armnn::DataType::Float32:
         default:
         {
-            qScale = 0.f;
+            qScale = 1.f;
             qOffset = 0;
             break;
         }
-- 
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