From c9cc80455ff29fd2c8622c9487ec9c57ade6ea30 Mon Sep 17 00:00:00 2001
From: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Date: Thu, 1 Nov 2018 16:15:57 +0000
Subject: IVGCVSW-1946: Remove armnn/src from the include paths

Change-Id: I663a0a0fccb43ee960ec070121a59df9db0bb04e
---
 .../backendsCommon/test/WorkloadTestUtils.hpp      | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 src/backends/backendsCommon/test/WorkloadTestUtils.hpp

(limited to 'src/backends/backendsCommon/test/WorkloadTestUtils.hpp')

diff --git a/src/backends/backendsCommon/test/WorkloadTestUtils.hpp b/src/backends/backendsCommon/test/WorkloadTestUtils.hpp
new file mode 100644
index 0000000000..05f6dde35f
--- /dev/null
+++ b/src/backends/backendsCommon/test/WorkloadTestUtils.hpp
@@ -0,0 +1,56 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include <armnn/Tensor.hpp>
+
+#include <backendsCommon/WorkloadInfo.hpp>
+
+namespace armnn
+{
+class ITensorHandle;
+}
+
+template <typename QueueDescriptor>
+void AddInputToWorkload(QueueDescriptor& descriptor,
+    armnn::WorkloadInfo& info,
+    const armnn::TensorInfo& tensorInfo,
+    armnn::ITensorHandle* tensorHandle)
+{
+    descriptor.m_Inputs.push_back(tensorHandle);
+    info.m_InputTensorInfos.push_back(tensorInfo);
+}
+
+template <typename QueueDescriptor>
+void AddOutputToWorkload(QueueDescriptor& descriptor,
+    armnn::WorkloadInfo& info,
+    const armnn::TensorInfo& tensorInfo,
+    armnn::ITensorHandle* tensorHandle)
+{
+    descriptor.m_Outputs.push_back(tensorHandle);
+    info.m_OutputTensorInfos.push_back(tensorInfo);
+}
+
+template <typename QueueDescriptor>
+void SetWorkloadInput(QueueDescriptor& descriptor,
+    armnn::WorkloadInfo& info,
+    unsigned int index,
+    const armnn::TensorInfo& tensorInfo,
+    armnn::ITensorHandle* tensorHandle)
+{
+    descriptor.m_Inputs[index] = tensorHandle;
+    info.m_InputTensorInfos[index] = tensorInfo;
+}
+
+template <typename QueueDescriptor>
+void SetWorkloadOutput(QueueDescriptor& descriptor,
+    armnn::WorkloadInfo& info,
+    unsigned int index,
+    const armnn::TensorInfo& tensorInfo,
+    armnn::ITensorHandle* tensorHandle)
+{
+    descriptor.m_Outputs[index] = tensorHandle;
+    info.m_OutputTensorInfos[index] = tensorInfo;
+}
\ No newline at end of file
-- 
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