From 356bfec771858ed435874b525fd88da505380103 Mon Sep 17 00:00:00 2001
From: Jim Flynn <jim.flynn@arm.com>
Date: Wed, 11 Dec 2019 16:59:01 +0000
Subject: IVGCVSW-4254 Patch Strided Slice CTS failures

Change-Id: Idc7e95f20b1fceb2135db4960877671c155b2f4b
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
---
 src/backends/backendsCommon/WorkloadUtils.cpp | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'src/backends/backendsCommon/WorkloadUtils.cpp')

diff --git a/src/backends/backendsCommon/WorkloadUtils.cpp b/src/backends/backendsCommon/WorkloadUtils.cpp
index 3185ba00d3..3abadd7563 100644
--- a/src/backends/backendsCommon/WorkloadUtils.cpp
+++ b/src/backends/backendsCommon/WorkloadUtils.cpp
@@ -184,4 +184,18 @@ armnn::ConstTensor ConvertWeightTensorFromArmnnToAcl(const ConstCpuTensorHandle*
     return weightPermuted;
 }
 
+int32_t ConvertMaskToACLFormat(int32_t mask, int32_t numDim)
+{
+    int32_t reversedMask = 0;
+    for (unsigned int i = 0; i < boost::numeric_cast<unsigned int>(numDim); ++i)
+    {
+        // Check if bit set in mask for each dimension
+        int32_t bit = (mask & 1 << i) != 0;
+        // Increment the new mask with the bits reversed
+        reversedMask += (bit << std::max(numDim-(boost::numeric_cast<int>(i)+1), 0));
+    }
+
+    return reversedMask;
+}
+
 } // namespace armnn
-- 
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