From e1fa50c70c647e3ba6dec0eb49ce82a3820fb6bb Mon Sep 17 00:00:00 2001
From: jimfly01 <jim.flynn@arm.com>
Date: Fri, 21 Sep 2018 12:09:51 +0100
Subject: IVGCVSW-1882: Added ClPadWorkload

* added ClPadWorkload class
* Updated ClWorkloadFactory
* added IsPadSupportedCl function
* Updated build files

Change-Id: Iadccc340a0eae1ff30fab6441854acac7f8edc92
---
 src/backends/ClWorkloads/ClPadWorkload.cpp | 62 ++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 src/backends/ClWorkloads/ClPadWorkload.cpp

(limited to 'src/backends/ClWorkloads/ClPadWorkload.cpp')

diff --git a/src/backends/ClWorkloads/ClPadWorkload.cpp b/src/backends/ClWorkloads/ClPadWorkload.cpp
new file mode 100644
index 0000000000..45a9d0dc44
--- /dev/null
+++ b/src/backends/ClWorkloads/ClPadWorkload.cpp
@@ -0,0 +1,62 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClPadWorkload.hpp"
+
+#include "backends/ClTensorHandle.hpp"
+#include "backends/aclCommon/ArmComputeTensorUtils.hpp"
+#include "ClWorkloadUtils.hpp"
+#include <arm_compute/core/Types.h>
+
+namespace armnn
+{
+using namespace armcomputetensorutils;
+
+template <armnn::DataType... T>
+ClPadWorkload<T...>::ClPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info)
+: TypedWorkload<PadQueueDescriptor, T...>(descriptor, info)
+{
+    this->m_Data.ValidateInputsOutputs("ClPadWorkload", 1, 1);
+
+    arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(this->m_Data.m_Outputs[0])->GetTensor();
+    arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(descriptor.m_Parameters.m_PadList);
+
+    m_Layer.configure(&input, &output, padList);
+}
+
+template <armnn::DataType... T>
+void ClPadWorkload<T...>::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClPadWorkload_Execute");
+    m_Layer.run();
+}
+
+bool ClPadValidate(const TensorInfo& input,
+                   const TensorInfo& output,
+                   const PadDescriptor& descriptor,
+                   std::string* reasonIfUnsupported)
+{
+    const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+    arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(descriptor.m_PadList);
+
+    const arm_compute::Status aclStatus = arm_compute::CLPadLayer::validate(&aclInputInfo,
+                                                                            &aclOutputInfo,
+                                                                            padList);
+
+    const bool supported = (aclStatus.error_code() == arm_compute::ErrorCode::OK);
+    if (!supported && reasonIfUnsupported)
+    {
+        *reasonIfUnsupported = aclStatus.error_description();
+    }
+
+    return supported;
+}
+
+} // namespace armnn
+
+template class armnn::ClPadWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
+template class armnn::ClPadWorkload<armnn::DataType::QuantisedAsymm8>;
-- 
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