From a0d56c77a53f5f991565041927003ce7460730ce Mon Sep 17 00:00:00 2001 From: Narumol Prangnawarat Date: Fri, 25 Jan 2019 10:46:40 +0000 Subject: IVGCVSW-2556 Add Layer implementation for Detection PostProcess * Add DetectionPostProcessDescriptor. * Add implementation for DetectionPostProcessLayer. * Unit test to validate output. Change-Id: If63e83eb2a2978c549071c7aeb272906e7c35fe9 --- include/armnn/Descriptors.hpp | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'include') diff --git a/include/armnn/Descriptors.hpp b/include/armnn/Descriptors.hpp index 44235c7ada..29d294e69f 100644 --- a/include/armnn/Descriptors.hpp +++ b/include/armnn/Descriptors.hpp @@ -329,6 +329,42 @@ struct DepthwiseConvolution2dDescriptor struct DetectionPostProcessDescriptor { + DetectionPostProcessDescriptor() + : m_MaxDetections(0) + , m_MaxClassesPerDetection(1) + , m_DetectionsPerClass(100) + , m_NmsScoreThreshold(0) + , m_NmsIouThreshold(0) + , m_NumClasses(0) + , m_UseRegularNms(false) + , m_ScaleX(0) + , m_ScaleY(0) + , m_ScaleW(0) + , m_ScaleH(0) + {} + + /// Maximum numbers of detections. + uint32_t m_MaxDetections; + /// Maximum numbers of classes per detection, used in Fast NMS. + uint32_t m_MaxClassesPerDetection; + /// Detections per classes, used in Regular NMS. + uint32_t m_DetectionsPerClass; + /// NMS score threshold. + float m_NmsScoreThreshold; + /// Intersection over union threshold. + float m_NmsIouThreshold; + /// Number of classes. + int32_t m_NumClasses; + /// Use Regular NMS. + bool m_UseRegularNms; + /// Center size encoding scale x. + float m_ScaleX; + /// Center size encoding scale y. + float m_ScaleY; + /// Center size encoding scale weight. + float m_ScaleW; + /// Center size encoding scale height. + float m_ScaleH; }; /// A NormalizationDescriptor for the NormalizationLayer. -- cgit v1.2.1