From 6a5e5e8b7e56f927d70ced3203d6e16df3fdd189 Mon Sep 17 00:00:00 2001 From: Derek Lamberti Date: Thu, 5 Dec 2019 14:41:20 +0000 Subject: IVGCVSW-4227 Add CpuAcc backend support for DetectionPostProcess Change-Id: I318bf92b8d1db593d9c30b9b4412bfecbe65bc12 Signed-off-by: Derek Lamberti --- include/armnn/ILayerSupport.hpp | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'include/armnn') diff --git a/include/armnn/ILayerSupport.hpp b/include/armnn/ILayerSupport.hpp index 54f4a2883b..a2d3961d34 100644 --- a/include/armnn/ILayerSupport.hpp +++ b/include/armnn/ILayerSupport.hpp @@ -111,11 +111,15 @@ public: const TensorInfo& output, Optional reasonIfUnsupported = EmptyOptional()) const = 0; - virtual bool IsDetectionPostProcessSupported( - const TensorInfo& input0, - const TensorInfo& input1, - const DetectionPostProcessDescriptor& descriptor, - Optional reasonIfUnsupported = EmptyOptional()) const = 0; + virtual bool IsDetectionPostProcessSupported(const TensorInfo& boxEncodings, + const TensorInfo& scores, + const TensorInfo& anchors, + const TensorInfo& detectionBoxes, + const TensorInfo& detectionClasses, + const TensorInfo& detectionScores, + const TensorInfo& numDetections, + const DetectionPostProcessDescriptor& descriptor, + Optional reasonIfUnsupported = EmptyOptional()) const =0; virtual bool IsDilatedDepthwiseConvolutionSupported( const TensorInfo& input, -- cgit v1.2.1