From e11e63d749b0909f13f9a39c8d34ef5523255170 Mon Sep 17 00:00:00 2001 From: Teresa Charlin Date: Wed, 21 Apr 2021 12:56:45 +0100 Subject: IVGCVSW-5909 Fix CTS failure in GpuAcc DIV int32 * CLWorkload was only supporting float Signed-off-by: Teresa Charlin Change-Id: Ic57a490f03a055c158edc19e831b153a44e25166 --- src/backends/cl/ClBackend.cpp | 2 +- src/backends/cl/ClLayerSupport.cpp | 2 +- src/backends/cl/ClWorkloadFactory.cpp | 2 +- src/backends/cl/backend.mk | 2 +- src/backends/cl/test/ClCreateWorkloadTests.cpp | 4 +- src/backends/cl/workloads/CMakeLists.txt | 4 +- .../cl/workloads/ClDivisionFloatWorkload.cpp | 56 ---------------------- .../cl/workloads/ClDivisionFloatWorkload.hpp | 34 ------------- src/backends/cl/workloads/ClDivisionWorkload.cpp | 56 ++++++++++++++++++++++ src/backends/cl/workloads/ClDivisionWorkload.hpp | 34 +++++++++++++ .../cl/workloads/ClMultiplicationWorkload.hpp | 3 -- src/backends/cl/workloads/ClWorkloads.hpp | 2 +- 12 files changed, 99 insertions(+), 102 deletions(-) delete mode 100644 src/backends/cl/workloads/ClDivisionFloatWorkload.cpp delete mode 100644 src/backends/cl/workloads/ClDivisionFloatWorkload.hpp create mode 100644 src/backends/cl/workloads/ClDivisionWorkload.cpp create mode 100644 src/backends/cl/workloads/ClDivisionWorkload.hpp diff --git a/src/backends/cl/ClBackend.cpp b/src/backends/cl/ClBackend.cpp index 33aff2731d..f97cb4bba8 100644 --- a/src/backends/cl/ClBackend.cpp +++ b/src/backends/cl/ClBackend.cpp @@ -26,7 +26,7 @@ #include "workloads/ClBatchNormalizationFloatWorkload.hpp" #include "workloads/ClConvolution2dWorkload.hpp" #include "workloads/ClDepthwiseConvolutionWorkload.hpp" -#include "workloads/ClDivisionFloatWorkload.hpp" +#include "workloads/ClDivisionWorkload.hpp" #include "workloads/ClFullyConnectedWorkload.hpp" #include "workloads/ClMultiplicationWorkload.hpp" #include "workloads/ClSubtractionWorkload.hpp" diff --git a/src/backends/cl/ClLayerSupport.cpp b/src/backends/cl/ClLayerSupport.cpp index 0ab79309a0..cdbbf0cf56 100644 --- a/src/backends/cl/ClLayerSupport.cpp +++ b/src/backends/cl/ClLayerSupport.cpp @@ -33,7 +33,7 @@ #include "workloads/ClDepthToSpaceWorkload.hpp" #include "workloads/ClDepthwiseConvolutionWorkload.hpp" #include "workloads/ClDequantizeWorkload.hpp" -#include "workloads/ClDivisionFloatWorkload.hpp" +#include "workloads/ClDivisionWorkload.hpp" #include "workloads/ClExpWorkload.hpp" #include "workloads/ClFillWorkload.hpp" #include "workloads/ClFloorFloatWorkload.hpp" diff --git a/src/backends/cl/ClWorkloadFactory.cpp b/src/backends/cl/ClWorkloadFactory.cpp index ee6bcd3bc3..8ff82f29ba 100644 --- a/src/backends/cl/ClWorkloadFactory.cpp +++ b/src/backends/cl/ClWorkloadFactory.cpp @@ -325,7 +325,7 @@ std::unique_ptr ClWorkloadFactory::CreateDetectionPostProcess( std::unique_ptr ClWorkloadFactory::CreateDivision(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info) const { - return MakeWorkload(descriptor, info, m_CLCompileContext); + return std::make_unique(descriptor, info, m_CLCompileContext); } std::unique_ptr ClWorkloadFactory::CreateElementwiseUnary(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/backend.mk b/src/backends/cl/backend.mk index 9a83257272..c097a03327 100644 --- a/src/backends/cl/backend.mk +++ b/src/backends/cl/backend.mk @@ -40,7 +40,7 @@ BACKEND_SOURCES := \ workloads/ClDepthToSpaceWorkload.cpp \ workloads/ClDepthwiseConvolutionWorkload.cpp \ workloads/ClDequantizeWorkload.cpp \ - workloads/ClDivisionFloatWorkload.cpp \ + workloads/ClDivisionWorkload.cpp \ workloads/ClExpWorkload.cpp \ workloads/ClFillWorkload.cpp \ workloads/ClFloorFloatWorkload.cpp \ diff --git a/src/backends/cl/test/ClCreateWorkloadTests.cpp b/src/backends/cl/test/ClCreateWorkloadTests.cpp index 765409a426..e22479c25b 100644 --- a/src/backends/cl/test/ClCreateWorkloadTests.cpp +++ b/src/backends/cl/test/ClCreateWorkloadTests.cpp @@ -137,7 +137,7 @@ BOOST_AUTO_TEST_CASE(CreateMultiplicationUint8WorkloadTest) BOOST_AUTO_TEST_CASE(CreateDivisionFloatWorkloadTest) { - ClCreateElementwiseWorkloadTest(); @@ -145,7 +145,7 @@ BOOST_AUTO_TEST_CASE(CreateDivisionFloatWorkloadTest) BOOST_AUTO_TEST_CASE(CreateDivisionFloat16WorkloadTest) { - ClCreateElementwiseWorkloadTest(); diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index 3a1b6b8432..04821bf4bb 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -34,8 +34,8 @@ list(APPEND armnnClBackendWorkloads_sources ClDepthwiseConvolutionWorkload.hpp ClDequantizeWorkload.cpp ClDequantizeWorkload.hpp - ClDivisionFloatWorkload.cpp - ClDivisionFloatWorkload.hpp + ClDivisionWorkload.cpp + ClDivisionWorkload.hpp ClExpWorkload.cpp ClExpWorkload.hpp ClFillWorkload.cpp diff --git a/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp b/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp deleted file mode 100644 index 3df8d52f6d..0000000000 --- a/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp +++ /dev/null @@ -1,56 +0,0 @@ -// -// Copyright © 2017 Arm Ltd. All rights reserved. -// SPDX-License-Identifier: MIT -// - -#include "ClDivisionFloatWorkload.hpp" - -#include -#include - -#include - -#include "ClWorkloadUtils.hpp" - -namespace armnn -{ - -arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, - const TensorInfo& input1, - const TensorInfo& output, - const ActivationDescriptor* activationDescriptor) -{ - const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0); - const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); - const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); - - const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo( - activationDescriptor); - - return arm_compute::CLArithmeticDivision::validate(&aclInput1, &aclInput2, &aclOutput, activationInfo); -} - - -ClDivisionFloatWorkload::ClDivisionFloatWorkload(const DivisionQueueDescriptor& descriptor, - const WorkloadInfo& info, - const arm_compute::CLCompileContext& clCompileContext) - : FloatWorkload(descriptor, info) -{ - m_Data.ValidateInputsOutputs("ClDivisionFloatWorkload", 2, 1); - - arm_compute::ICLTensor& input0 = static_cast(m_Data.m_Inputs[0])->GetTensor(); - arm_compute::ICLTensor& input1 = static_cast(m_Data.m_Inputs[1])->GetTensor(); - arm_compute::ICLTensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); - - const arm_compute::ActivationLayerInfo activationInfo = ConvertAdditionalInfoToAclActivationLayerInfo(descriptor); - - m_ArithmeticDivision.configure(clCompileContext, &input0, &input1, &output, activationInfo); -} - -void ClDivisionFloatWorkload::Execute() const -{ - ARMNN_SCOPED_PROFILING_EVENT_CL("ClDivisionFloatWorkload_Execute"); - RunClFunction(m_ArithmeticDivision, CHECK_LOCATION()); -} - -} //namespace armnn diff --git a/src/backends/cl/workloads/ClDivisionFloatWorkload.hpp b/src/backends/cl/workloads/ClDivisionFloatWorkload.hpp deleted file mode 100644 index 481b8b0a89..0000000000 --- a/src/backends/cl/workloads/ClDivisionFloatWorkload.hpp +++ /dev/null @@ -1,34 +0,0 @@ -// -// Copyright © 2017 Arm Ltd. All rights reserved. -// SPDX-License-Identifier: MIT -// - -#pragma once - -#include - -#include - -namespace armnn -{ - -arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, - const TensorInfo& input1, - const TensorInfo& output, - const ActivationDescriptor* activationDescriptor = nullptr); - -class ClDivisionFloatWorkload : public FloatWorkload -{ -public: - ClDivisionFloatWorkload(const DivisionQueueDescriptor& descriptor, - const WorkloadInfo& info, - const arm_compute::CLCompileContext& clCompileContext); - - using FloatWorkload::FloatWorkload; - void Execute() const override; - -private: - mutable arm_compute::CLArithmeticDivision m_ArithmeticDivision; -}; - -} //namespace armnn diff --git a/src/backends/cl/workloads/ClDivisionWorkload.cpp b/src/backends/cl/workloads/ClDivisionWorkload.cpp new file mode 100644 index 0000000000..be5f3b8225 --- /dev/null +++ b/src/backends/cl/workloads/ClDivisionWorkload.cpp @@ -0,0 +1,56 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClDivisionWorkload.hpp" + +#include +#include + +#include + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ + +arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output, + const ActivationDescriptor* activationDescriptor) +{ + const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo( + activationDescriptor); + + return arm_compute::CLArithmeticDivision::validate(&aclInput1, &aclInput2, &aclOutput, activationInfo); +} + + +ClDivisionWorkload::ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext) + : BaseWorkload(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClDivisionWorkload", 2, 1); + + arm_compute::ICLTensor& input0 = static_cast(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& input1 = static_cast(m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ICLTensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertAdditionalInfoToAclActivationLayerInfo(descriptor); + + m_ArithmeticDivision.configure(clCompileContext, &input0, &input1, &output, activationInfo); +} + +void ClDivisionWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClDivisionWorkload_Execute"); + RunClFunction(m_ArithmeticDivision, CHECK_LOCATION()); +} + +} //namespace armnn diff --git a/src/backends/cl/workloads/ClDivisionWorkload.hpp b/src/backends/cl/workloads/ClDivisionWorkload.hpp new file mode 100644 index 0000000000..d0c27bb310 --- /dev/null +++ b/src/backends/cl/workloads/ClDivisionWorkload.hpp @@ -0,0 +1,34 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include + +#include + +namespace armnn +{ + +arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output, + const ActivationDescriptor* activationDescriptor = nullptr); + +class ClDivisionWorkload : public BaseWorkload +{ +public: + ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext); + + using BaseWorkload::BaseWorkload; + void Execute() const override; + +private: + mutable arm_compute::CLArithmeticDivision m_ArithmeticDivision; +}; + +} //namespace armnn diff --git a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp index 424f3d7045..7bc0db7ce9 100644 --- a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp +++ b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp @@ -32,6 +32,3 @@ private: }; } //namespace armnn - - - diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index f99a9fa11b..0ae7f4ec22 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -16,7 +16,7 @@ #include "ClDepthToSpaceWorkload.hpp" #include "ClDepthwiseConvolutionWorkload.hpp" #include "ClDequantizeWorkload.hpp" -#include "ClDivisionFloatWorkload.hpp" +#include "ClDivisionWorkload.hpp" #include "ClExpWorkload.hpp" #include "ClFillWorkload.hpp" #include "ClFloorFloatWorkload.hpp" -- cgit v1.2.1