From ab8a4465ba32cb00ad05d63abfd2e60c307edc51 Mon Sep 17 00:00:00 2001
From: Ryan OShea <ryan.oshea3@arm.com>
Date: Thu, 3 Feb 2022 10:45:51 +0000
Subject: IVGCVSW-6680 Delegate Segfaults on Execute Network

 * Change to check for success instead of specific failure
 * Fix which map index is used when assigning outputs

Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
Change-Id: I13d8e989e35789ad3e2465d595905c5a5603ae0f
---
 tests/ExecuteNetwork/ExecuteNetwork.cpp | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/tests/ExecuteNetwork/ExecuteNetwork.cpp b/tests/ExecuteNetwork/ExecuteNetwork.cpp
index f321a26009..abcda40d1d 100644
--- a/tests/ExecuteNetwork/ExecuteNetwork.cpp
+++ b/tests/ExecuteNetwork/ExecuteNetwork.cpp
@@ -97,7 +97,7 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
                                  armnnDelegate::TfLiteArmnnDelegateDelete);
         // Register armnn_delegate to TfLiteInterpreter
         status = tfLiteInterpreter->ModifyGraphWithDelegate(std::move(theArmnnDelegate));
-        if (status == kTfLiteError)
+        if (status != kTfLiteOk)
         {
             ARMNN_LOG(fatal) << "Could not register ArmNN TfLite Delegate to TfLiteInterpreter!";
             return EXIT_FAILURE;
@@ -284,13 +284,13 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
             }
 
             std::cout << tfLiteInterpreter->GetOutputName(outputIndex) << ": ";
-            if (params.m_OutputTypes[outputIndex].compare("float") == 0)
+            if (params.m_OutputTypes[paramOutputIndex].compare("float") == 0)
             {
                 auto tfLiteDelageOutputData = tfLiteInterpreter->typed_tensor<float>(tfLiteDelegateOutputId);
                 if(tfLiteDelageOutputData == NULL)
                 {
                     ARMNN_LOG(fatal) << "Output tensor is null, output type: "
-                                        "\"" << params.m_OutputTypes[outputIndex] << "\" may be incorrect.";
+                                        "\"" << params.m_OutputTypes[paramOutputIndex] << "\" may be incorrect.";
                     return EXIT_FAILURE;
                 }
 
@@ -302,13 +302,13 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
                     }
                 }
             }
-            else if (params.m_OutputTypes[outputIndex].compare("int") == 0)
+            else if (params.m_OutputTypes[paramOutputIndex].compare("int") == 0)
             {
                 auto tfLiteDelageOutputData = tfLiteInterpreter->typed_tensor<int32_t>(tfLiteDelegateOutputId);
                 if(tfLiteDelageOutputData == NULL)
                 {
                     ARMNN_LOG(fatal) << "Output tensor is null, output type: "
-                                        "\"" << params.m_OutputTypes[outputIndex] << "\" may be incorrect.";
+                                        "\"" << params.m_OutputTypes[paramOutputIndex] << "\" may be incorrect.";
                     return EXIT_FAILURE;
                 }
 
@@ -320,14 +320,14 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
                     }
                 }
             }
-            else if (params.m_OutputTypes[outputIndex].compare("qsymms8") == 0 ||
-                     params.m_OutputTypes[outputIndex].compare("qasymms8") == 0)
+            else if (params.m_OutputTypes[paramOutputIndex].compare("qsymms8") == 0 ||
+                     params.m_OutputTypes[paramOutputIndex].compare("qasymms8") == 0)
             {
                 auto tfLiteDelageOutputData = tfLiteInterpreter->typed_tensor<int8_t>(tfLiteDelegateOutputId);
                 if(tfLiteDelageOutputData == NULL)
                 {
                     ARMNN_LOG(fatal) << "Output tensor is null, output type: "
-                                        "\"" << params.m_OutputTypes[outputIndex] << "\" may be incorrect.";
+                                        "\"" << params.m_OutputTypes[paramOutputIndex] << "\" may be incorrect.";
                     return EXIT_FAILURE;
                 }
 
@@ -339,14 +339,14 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
                     }
                 }
             }
-            else if (params.m_OutputTypes[outputIndex].compare("qasymm8") == 0 ||
-                     params.m_OutputTypes[outputIndex].compare("qasymmu8") == 0)
+            else if (params.m_OutputTypes[paramOutputIndex].compare("qasymm8") == 0 ||
+                     params.m_OutputTypes[paramOutputIndex].compare("qasymmu8") == 0)
             {
                 auto tfLiteDelageOutputData = tfLiteInterpreter->typed_tensor<uint8_t>(tfLiteDelegateOutputId);
                 if(tfLiteDelageOutputData == NULL)
                 {
                     ARMNN_LOG(fatal) << "Output tensor is null, output type: "
-                                        "\"" << params.m_OutputTypes[outputIndex] << "\" may be incorrect.";
+                                        "\"" << params.m_OutputTypes[paramOutputIndex] << "\" may be incorrect.";
                     return EXIT_FAILURE;
                 }
 
@@ -361,7 +361,7 @@ int TfLiteDelegateMainImpl(const ExecuteNetworkParams& params, const armnn::IRun
             else
             {
                 ARMNN_LOG(fatal) << "Output tensor is null, output type: "
-                                    "\"" << params.m_OutputTypes[outputIndex] <<
+                                    "\"" << params.m_OutputTypes[paramOutputIndex] <<
                                  "\" may be incorrect. Output type can be specified with -z argument";
                 return EXIT_FAILURE;
             }
-- 
cgit v1.2.1