From 03c7ff3f6188240baaeaeb405a357a0c58195fec Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Tue, 22 Aug 2023 12:00:04 +0100 Subject: IVGCVSW-7702 Update Doxygen Docu for 23.08 Signed-off-by: Nikhil Raj Change-Id: I357a9f7e47614589327c1ac5d95b6224ff77103d --- 23.08/_conv3d_impl_8hpp.html | 145 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 23.08/_conv3d_impl_8hpp.html (limited to '23.08/_conv3d_impl_8hpp.html') diff --git a/23.08/_conv3d_impl_8hpp.html b/23.08/_conv3d_impl_8hpp.html new file mode 100644 index 0000000000..31933ceaf0 --- /dev/null +++ b/23.08/_conv3d_impl_8hpp.html @@ -0,0 +1,145 @@ + + + + + + + + +Arm NN: src/backends/reference/workloads/Conv3dImpl.hpp File Reference + + + + + + + + + + + + + + + + +
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+  23.08 +
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+Namespaces | +Functions
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Conv3dImpl.hpp File Reference
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#include "BaseIterator.hpp"
+#include "Decoders.hpp"
+#include "Encoders.hpp"
+#include <armnn/Tensor.hpp>
+#include <armnnUtils/DataLayoutIndexed.hpp>
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+Include dependency graph for Conv3dImpl.hpp:
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Go to the source code of this file.

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 armnn
 Copyright (c) 2021 ARM Limited and Contributors.
 
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+Functions

void Convolve3d (const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int paddingFront, unsigned int xStride, unsigned int yStride, unsigned int zStride, unsigned int xDilation, unsigned int yDilation, unsigned int zDilation)
 
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