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2023-06-29Bugfix: -Werror=unused-result - unnecessary line, previously called aboveFrancis Murtagh
* this line is used earlier to initialize subgraphPtr Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Iff24da2acab33e59460455977e221066973532a2
2023-06-26Update ACL pin to c952596e70f2fe0073029f053e329a4e930ced8cNikhil Raj
* activationInfo passed in directly to configure() rather than part of matMulInfo Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I546def1c1e1cabaf50629f7d78ae0ba459766ed4
2023-06-22IVGCVSW-7785 Extend support for 3D tensors BATCH_TO_SPACE and SPACE_TO_BATCH ↵Teresa Charlin
in CpuRef * Both layers were assuming 4D tensors, now 3D is supported too. * Remove some unnecessary includes * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7bdd11e4936a27cd97ec65fd915e6ccaa1494cff
2023-06-22IVGCVSW-7785 BugFix: ExpandDims not working when batch!=1Teresa Charlin
* This commit fixes partially the ticket. In ToTensorInfo() we assume batch is 1 when it is unknown. We call OutputTensorInfoFromInputs() to amend this assumption/ However, this does not work for reshape layer. Therefore, we have to calculate the output shape in the ParseExpandDims(). Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iedc32a44b4ec0d8b7d2cc0b08f38f0776402f7bd
2023-06-19Update ACL pin to 043613fbb199e2c4fdd12c2c9a1785db9b0c45faNikhil Raj
* Break up Utils.h a bit to reduce unused code being included everywhere * Add FullyConnectedLayerInfo.h to ArmComputeUtils.hpp and remove Types.h * Add MatMulInfo.h to Neon and CL BatchMatMulWokloads Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I2fbe90cb40dc59add90735dafe9fef9aab3fbf06
2023-06-14Add DataType to .dot files for constant layersTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I399ed1205f14d4fdd1194026c7a66bf00a1dd68d
2023-06-14IVGCVSW-7791 Enable dynamic bias in Conv in CpuAcc and GpuAccKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I722a9e4f3dba2500c624c6326f74085277e0d631
2023-06-13IVGCVSW-7790 - Enable dynamic bias in DWConv in GpuAccKevin May
* Remove checks for ias being constant * Convert ARMNN_ASSERTS to throw Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I009f4008393502bd9e30269151ad935ef67f0bc1
2023-06-09IVGCVSW-7691 Replace asserts with exceptions in Ref GatherKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: If6731b4757257d983c09210b50315cd5d9837e20
2023-06-07IVGCVSW-7789 Enable dynamic bias in Depthwise Convolution in CpuAccTeresa Charlin
* Dynamic bias are supported by CpuAcc for this layer * Indentation and const modifiers minor changes Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I3b25f14feea55f746c254a832d97e21a1551ca36
2023-06-07Fix incorrect validation of Unidirectional Sequence LSTM on Cl and NeonNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I54c60fb98b9c560c300572f46d42b13aec7e402e
2023-05-23MLCE-1022 Fix failure on UnidirectionalSequenceLstm OperatorNarumol Prangnawarat
* Fix failure to parse UnidirectionalSequenceLstm Operator on CpuAcc * Fix failure to parse UnidirectionalSequenceLstm Operator on GpuAcc * Fix IsLayerSupported tests when there are multiple otutputs Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ia690f34d3c7fae87bd36c97056a3ff71baa865f6
2023-05-23BugFix: check for options!=null before adding fused activation in TfLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I96fd26559450690fbe99a0e8fbe193ddf5d3a34b
2023-05-23IVGCVSW-7732 Enable dynamic bias in FullyConnected in CpuAcc and GpuAccTeresa Charlin
* Dynamic bias are supported by ACL for this layer. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I428bd42a97e0c26c72f9925e3cb209c2fc9a650d
2023-05-18IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAccJohn Mcloughlin
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-05-11Revert "IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d ↵TeresaARM
DWConv and FC" This reverts commit fecd9ed396705a17805ffc49839bd82ae24c892b. Reason for revert: IVGCVSW-7727 Dynamic bias CTS failing Change-Id: I53f67d60fca0e60a81298f90450ceef26b97c321 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
2023-05-09IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d DWConv and FCTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib6914a9a208475b68e969eba6f70fae4061efa9b
2023-05-09Removing "shiftID" from BackendProfilingCounterRegisterMockBackendTestNikhil Raj
This test case has caused several problems over the years. All the problems are around using counter indices to identify counters rather than names. Updating the test to check for registered counter names. Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ic5ebc9b2d53f2db301a3067ecce4befc14dcb8a5
2023-05-09IVGCVSW-5846 Remove TODO statements from Armnn CodeDavid Monahan
* Removed all instances of TODO statements from comments * Removed statements are noted as part of IVGCVSW-5846 * Removed ProtoxtFixture.cpp from the Onnx Parser tests as it's not used Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia0a15f8a0d4123c8831638634eaa0d1018c40e2c
2023-05-08IVGCVSW-7454 Fix CpuAcc FC dynamic weightsTeresa Charlin
* Pass to ACL the flag for constant weights and bias in FC, conv and DWconv workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iae2810c8d1a402d4afc1e757846665315a80d3ea
2023-05-08IVGCVSW-7454 Enable NonConstWeights in GpuAccTeresa Charlin
* Set flag for constant weights and bias in ACL tensorInfo in ACl workloads * Set flag for constant weights and bias in Unit Tests * Add to dot file for FullyConnected layer the constantWeights flag Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I87e1fef516ce4a8a59245dfdf7d92c153418e1d6
2023-05-08Improve reusability of code that is defined out by cmake build pathsRyan OShea
* Added new ARMNN_STUB_PROFILING and ARMNN_DISABLE_DYNAMIC_BACKEND defines to replace BUILD_BARE_METAL and BUILD_EXECUTE_NETWORK_STATIC * Add new CMake variables to disable sample apps and dynamic backends * Improve BUILD_SHARED_LIBS CMake variable * Add new archive output location to various libraries so that the static libraries appear in the same location as the shared libraries * Fixes for bare metal build * Add ARMNN_DISABLE_FILE_SYSTEM defines to missing locations Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: I1db9a8f483e7134bd261294b35240cf21b150d45
2023-05-08IVGCVSW-7308 Add GpuAcc Batch MatMul workloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7b7ac20deec8637dc46ca990d339d92c4587cbe4
2023-05-08IVGCVSW-7307 Add CpuAcc Batch MatMul WorkloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I992ae9aae1174214607bf29305f21cdeaf3fdc1b
2023-05-02IVGCVSW-7404 Replacing asserts with exceptions in CopyTensorContentsGenericColm Donelan
* The source and destination size checks in CopyTensorContentsGeneric are handled by asserts instead of exceptions. * Adding unit tests. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ia00c07158afde6768002dc6059067fd08e47fcff
2023-04-28Make Convert workloads use arm_compute::NECast in CpuAcc backendMatthew Bentham
NECast can use conversion instructions where they are available so this should in general be faster. Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com> Change-Id: I3f259e17b280a4f4c36f363965ffbc8ee8c4c29f
2023-04-27Add unit test for Neon Convert workloadsMatthew Bentham
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com> Change-Id: I501a3e01932d44eca796e93a9383378dafc758c5
2023-04-26BugFix: calculate explicit padding for Transpose Convolution using output sizeTeresa Charlin
* If the output shape is given in Transpose convolution, use it to calculate the padding Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0bf3dee94c2ce606ed67fb385018b220188c3017
2023-04-26Update cxxopts from 3.0 to 3.1.1Jim Flynn
!android-nn-driver:9431 Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: I58143445b5c5cf2aafd0838156c9543adce21e6a
2023-04-19GitHub #640 Add support for CEIL operatorTeresa Charlin
* Reference workload * TfLite Delegate * TfLite Parser * Serializer and Deserializer * Changed fallback tests in delegate to use COS instead of CEIL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I36e0dbff33694182d1dba0c95d463506428e2f04
2023-04-18GitHub #719 Set quantization parameter scale to 1.0, instead of 0.0.Teresa Charlin
* Arm NN does not account for int8 or uint8 not quantized types, Tensorflow does. Not quantized int8 and uint8 is the same as quantized int8 and uint8 with scale = 1.0 and offset= 0 Default offset/zero_point was already 0, this review sets the default scale to 1.0. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc3eecc281de516c2cc706e17bde01c64ff9556e
2023-04-14IVGCVSW-7197 Implement Pimpl Idiom OptimizerOptions TOSA testsJohn Mcloughlin
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I6ce034d71f83765a9db65ab8f95e0b391dd8a9e4
2023-04-12IVGCVSW-7197 Implement Pimpl Idiom for OptimizerOptionsJohn Mcloughlin
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: Id4bdc31e3e6f18ccaef232c29a2d2825c915b21c
2023-04-11IVGCVSW-7507 Pass m_Crops in BatchToSpaceND CpuAcc and GpuAcc workloadsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I902c9187eefe7595271312fdc16273f7aa3d41cd
2023-04-06IVGCVSW-7674 Fixing include paths in sample dynamic backend.Colm Donelan
Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I5d2fe903bab128e4fc84a8239ba5621f79572fe8
2023-04-05IVGCVSW-7672 Arm NN build failures in MainMike Kelly
* Added required includes if ARMNN_LEAK_CHECKING_ENABLED. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I18bde66e8a1e19690747d7e05d10dbe0cedb1c1b
2023-04-05IVGCVSW-7673 Fix for failing buildMike Kelly
* Added ARMNN_NO_DEPRECATE_WARN_ to test files for Tosa and DynamicSample. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I2f1b771d719cf637e17cc423cd2211db9643a6e8
2023-04-05Fix gcc 13 compiler errorsPablo Marquez Tello
* Resolves MLCE-1040 Change-Id: I32878ed70af356832403e83dcb63b0b89a8a84e3 Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
2023-04-05IVGCVSW-7662 Update BuildGuideAndroidNDK.mdMike Kelly
* Fixed broken steps in BuildGuideAndroidNDK.md * Fixed broken links in BuildGuideAndroidNDK.md * Removed unneeded steps from BuildGuideAndroidNDK.md * Added instructions for building the tflite parser and delegate for android * Fixed errors in CMakeLists.txt that made it impossible to build without Neon or Ref. * Added build_android_ndk_guide.sh, a shell script that contains the same steps as BuildGuideAndroidNDK.md Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ie0479d3a2e4a776e7de88017b222d35a48c1fe10
2023-04-04Remove GetGraph and include of Graph.hpp header from public headerMatthew Bentham
Remove deprecated GetGraph() from OptimizationViews. This method has been deprecated for a long time and no backends still need it. Remove include of Graph.hpp from the public headers. Add includes elsewhere to deal with the header fallout. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I8dae275a8a446d9d0e19be62684e9b3cd2fa493d
2023-04-03IVGCVSW-3808 Deprecation notices for old ElementwiseBinary layersMike Kelly
* Added Deprecation notices for old ElementwiseBinary layers. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I5bd0f186aaed675885d667f47e1e210ee9ec84f8
2023-03-31Revert "IVGCVSW-3808 Deprecation notices for old ElementwiseBinary layers"Mike Kelly
This reverts commit 52e90bf59ecbe90d33368d8fc1fd120f07658aaf. Change-Id: I5a0d244593d8e760ee7ba0c9d38c02377e1bdc24 Signed-off-by: Mike Kelly <mike.kelly@arm.com>
2023-03-30IVGCVSW-7454 Enable NonConstWeights in CpuAccTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I74a93b1e2e5c9f12ce4523df3f21e5c0967fddfb
2023-03-30IVGCVSW-3808 Deprecation notices for old ElementwiseBinary layersMike Kelly
* Added Deprecation notices for old ElementwiseBinary layers. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Iebbbaff38cc9c347b25eb2f9054c914a4f931c68
2023-03-29BugFix: Mean layer reading negative axis incorrectly in TFLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I3ccfc2a4c95c57743927fb276faa756740f5c55a
2023-03-14IVGCVSW-3808 Add ElementwiseBinaryLayerMike Kelly
!android-nn-driver:9329 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary operations including Add, Div, Sub, Maximum, Mul and Minimum. * Updated Delegate to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add layer. * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated CL and Neon tests to use ElementwiseBinaryLayer. * Updated CL and Neon Backend Specific Optimizations to accept ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum layers. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75
2023-02-28Add constant version of IConnectableLayer::GetConstantTensorsByRefMatthew Bentham
This makes it easier to use, particularly in backends where it is common to pass around const pointers to IConnectableLayer. The non-constant version is rewritten to use the constant version. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: Id3a8384447e93c213299a85ade9a667df5960534
2023-02-24IVGCVSW-7546 SPACE_TO_DEPTH support added in tflite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4f5016841c31b183440f31c1e177bc41d2b8dbb7
2023-02-22Fix segfault in ParseTransposeConv2d when output_shape is not constantRyan OShea
We currently check that output_shape is an input for transpose conv2d. If that is an input, we assume that it is constant and attempt to copy the data into the descriptor. When this data is not constant and instead comes from the output of another layer we segfault. When not constant we will use infer output shapes. * Adds a check into ParseTransposeConv2d that inputs[0] is constant Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: I01176ae22974767a2306a3db749a029ed220d88b
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