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2021-02-11MLCE-347 Bug fixes in Reduce: QueueDescriptor.validate and init REDUCE_MINTeresa Charlin
* Allow input tensors of any rank in ReduceQueueDescriptor::validate * Fix VTS tests failing for REDUCE_MIN due to initialization Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id8fba1662ade4e0a967093fe5a53b275847f2393
2021-02-09IVGCVSW-5679 Fix Android NDK OOB buildMatthew Sloyan
* Specific OOB builds will fail if flatc is not available. * flatc command is now only run if found. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Iab6e082fe35dc3c3dfb78a29e1630c9edbb80be6
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2021-02-08IVGCVSW-4873 Implement Pimpl Idiom for IRuntimeKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I52448938735b2aa678c47e0f3061c87fa0c693b1
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2021-01-25Update ACL pin to 6a4ebe1305b544aec1ba0bfc67ed65d94fcc8c2eNikhil Raj
* Pass in new window parameter to the schedule_op function Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I8579d2d6e55ab9888471bd780628df0f73438498
2021-01-25IVGCVSW-5525 Handle Neon optionality on 32 bit linux platformsFrancis Murtagh
* Add neon detection for linux using HWCAPs * Add test to check for backend throwing BackendUnavailable exception Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Ib74aeb06abe5f88f21ecdd1edb2a1cd20ee2019d
2021-01-22IVGCVSW-5571 Expose the TfLite Delegate to the TfLite python APIJan Eilers
* Implemented external delegate adaptor interface for TfLite * Activated armnn logging for delegate * Added logging info to indicate if gpu tuning is turned on * Added pytests to ensure functionality of the external delegate adaptor * Included the delegate directory into doxygen * Added documentation on how to use the external delegate in python Signed-off-by: Finn Williams <Finn.Williams@arm.com> Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Id3b4588fb0b9ac7e3f47ba2c19feead7beb58e18
2021-01-21IVGCVSW-5616 Don't fuse activation if quantization parameters are differentTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6504e922113aa9e397f53e570ebcf47e1f133945
2021-01-15IVGCVSW-5644 Add documentation for cache loaded networkMatthew Sloyan
* Added ModelOptions documentation to CLBackendModelContext * Improved options descriptions in ExecuteNetworkProgramOptions.cpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I14f0c8bb4f299809b89f49c616b691e2f7956d5b
2021-01-15Renaming NEActivationLayerKernel to CpuActivationKernelNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I33dc1127627b4b89c02a3bea246eaf7499e5a780
2021-01-13IVGCVSW-5483 Fix cache loaded network nightly failureMatthew Sloyan
* Fixed issue where nightly job couldn't find flatbuffers import. * Removed unnecessary commented code. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If201f3fe54bf3bdd167aaf5d108154165d2a910d
2021-01-11IVGCVSW-5483 'Implement Loading and Saving to File'Matthew Sloyan
* Implemented Serialization and Deserialization of CLContext. * Fixed flatbuffers android-nn-driver dependency. !android-nn-driver:4772 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: If806f050535ffaa70922ba0f1ffe7bb10f902329
2020-12-17IVGCVSW-4625 Add CL Rank WorkloadDavid Monahan
* Added CL implementation of Rank Workload * Removed references to memcpy_s as it's a windows only function Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia63666b9640d76a775f2ab98b3cd7e9f77b5a507
2020-12-16IVGCVSW-5595 Fix incorrect padding value for asymmetric quantized typeNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I85f0c30757043f8c27c78d607f0f9dbbdd35b9fb
2020-12-03IVGCVSW-4626 Add Neon Rank WorkloadDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I5a85597e75d2b879ae234c6929686fabe99d7bc8
2020-12-02IVGCVSW-5482 'Add a ClCompileContext parameter to each ClWorkload Constructor'Sadik Armagan
* Injected CLCompileContext object to each CL workload. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I4837dbd3d5b56cf743b3b89c944e3cdf8b11a42a
2020-11-30IVGCVSW-5568 Revert "IVGCVSW-5563 Fix Crash on model with FullyConnected ↵Teresa Charlin
Sigmoid Activation" * This reverts commit be25d94aefe53f221304b1f5f344913b708f808b. * Add Unit Test: any receiver layer + any activation layer in float and QAsymmU8 * Tidy up fuse activation tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie059d03b85cd17eaaafe5188bb173672a1fb9ae0
2020-11-27IVGCVSW-5499 Missing validation for zero strideTeresa Charlin
* Convolution * Depthwise Convolution Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I61b356fbffb176e9a05e08d9b6867d082b6712c8
2020-11-26IVGCVSW-5481 'Add ClCompileContext to ClWorkloadFactory'Sadik Armagan
* Introduced CLCompileContext to ClWorkloadFactory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ied38f4336210502e5f518b9955ae6a5ba3d242b3
2020-11-23IVGCVSW-5569 Fix Unittest failure while building using EthosNAcc backendNarumol Prangnawarat
* Correct the id when EthosN is enable Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I5203e615f809e56c7597ffeeec56b5ad38d4ff17
2020-11-19IVGCVSW-5093 Remove redundant LogicalUnary functionsJames Conroy
* In favour of ElementwiseUnary functions which are the currently used code path. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I34964d2dcabd4b7ddf0b455df17c48e3c6812ee4
2020-11-19IVGCVSW-5563 Fix Crash on model with Fullyconnected Sigmoid ActivationKevin May
* Add supported activations check to Neon FullyConected validate Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I67a36eb83d0568d000e928e27eba3c84e32cdc72
2020-11-18IVGCVSW-5092 Add CL Logical workloadJames Conroy
* Add CL Logical workloads for NOT, AND and OR. * Enable Layer and IsSupported tests on CL. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I8b7227b2487fdbbb55a4baf6e61f290313947de1
2020-11-18IVGCVSW-5093 Add NEON Logical workloadJames Conroy
* Add NEON Logical workloads for NOT, AND and OR. * Enable Layer and IsSupported tests on NEON. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Ibca59530457a664ca3d77751825642f8daf52fab
2020-11-18Fix logical vts skipNarumol Prangnawarat
* Add Boolean support for Reshape * Use LogicalUnary factory and data type for LogicalNot Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I8e072fde200b7716556ae67f79616458cf98ff20
2020-11-17MLCE-278-IVGCVSW-5530 FusedActivation issuesMike Kelly
* GetOverriddenDataType was returning incorrect quantization data * Optimized CpuAcc and GpuAcc SubGraphs fail validation on debug versions of ArmNN Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ie97935cc2af67bd9aeebc94b63dafa458bd1aa8c
2020-11-17IVGCVSW-5530 'Cannot run SSD Mobilenet f16/uint8 on CpuRef via ExecuteNetwork'Sadik Armagan
* Added FP16 DataType support to DetectionPostProcess * For DetectionPostProcess layer output is always Float32 regardless of input type Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I21f63dd08f0863e9a98e105b3009bab3da1ab0c3
2020-11-17MLCE-278 issue with signed-int8 quantized modelTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I144ebfca524f4cdee9cc82eef3995c6b32bfc40b
2020-11-13IVGCVSW-5189 Fix error running EfficientNet-Lite on GpuAccNarumol Prangnawarat
* Correct datatype of QAsymmS8 Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Id4987b91e06d87735254d3cdd5c9adbe11cc8870
2020-11-13IVGCVSW-5328-5329 Fuse Activation CleanupMike Kelly
* Resolved the review items in the main review. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I5da34b74ac204569ea2d210fb5a069beb7d0835b
2020-11-13IVGCVSW-5328-5329 Fuse ActivationMike Kelly
* Added Fused Activation Optimization to both CL and Neon backends. * Added Fused Activation support to all the CL and Neon workloads that support it. * Changed ProfilingTest network to be a Convolution layer followed by an Abs layer rather than an Activation layer. * Added IBackendInternal::OptimizeSubgraphView function that can accept a ModelOptions. * Network will now call OptimizeSubgraphView passing in the ModelOptions. Signed-off-by: Keith Davis <keith.davis@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib536ac3cbafc7d9b35c139ad9a65b7735262cd9d
2020-11-13IVGCVSW-5495 Fix validation for per-channel quantJames Conroy
* Now enter if block if bias OR weights have multiple quantization scales. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I5eba0ceac9b347d0e3467e86d72d587b749b9521
2020-11-12Update ACL pin to d7341fb9e3b24b904edf7ac9d83e1e063bc77765Teresa Charlin
* Use NEConvolutionLayer Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ieb81fafaf34a63be8daf297ebe1bb0e4079daf4e
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-11-09IVGCVSW-5327 Add to Layer a binary blob to host the activation layer infoKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I0a07dea96a86849701ba387dbea148909a6d729b
2020-10-30IVGCVSW-5322 Fix segfault between Neon and Cl layersNarumol Prangnawarat
* Fallback to memory copy if memory import is not supported * Remove direct compatibility between Neon and Cl Tensors * Unit tests fallback from Neon to Cl and Cl to Neon Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Iec00a77423fb23b37a6b1aefee1b2ec4d649efca
2020-10-28IVGCVSW-5433 Remove boost::transform_iterator and make_transform_iteratorFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I28aace7092cff5743353df1b1de8e7a4691554d3
2020-10-23GitHub#465 Fix NonMaxSuppressionantkillerfarm
If visited flag set true, it should not be visited any more. For example, if we put 10 boxes (ordered by score) into NonMaxSuppression: * Step1: Suppose Box 2/3/6/8 are suppressed by Box 1. Box 4/5/7/9/10 survived. * Step2: Correct way: We use Box 4 to suppress the survive boxes. Prior to this commit: Box 4 may be suppressed by Box 2, even Box 2 is already suppressed by Box 1... Signed-off-by: Antkillerfarm <antkillerfarm@gmail.com> Change-Id: I38d7a84287649827a16565748592fb562b4df5d5
2020-10-14IVGCVSW-5335 Added Documentation for fast_mathMike Kelly
* Added Documentation for fast_math to CLBackendModelContext * Added Documentation for fast_math to NeonBackendModelContext Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I43a0568ae6914e074a80130a051e5d9bb849f2ba
2020-10-13IVGCVSW-4489 Remove remaining occurrence of boost::formatMatthew Sloyan
* Replaced with fmt::format in Descriptors.cpp. * Removed remaining boost/format headers in ArmNN codebase. * Removed additional boost header in Network.cpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib98b83bf4ec99ef98ce7a3635ec0dd478c3e43e1
2020-10-08IVGCVSW-5363 Add Unmap layer and Unmap workloadJim Flynn
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Signed-off-by: Jim Flynn <jim.flynn@arm.com> Change-Id: Ie5ecfa67e4763d0c058905592fe2e2fd7315f85c
2020-10-08Remove Resize from list of layers that need padding in NeonTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I054f0b71d4e9581c637fa09e40f6b661e58e39f3
2020-10-07IVGCVSW-5362 Add Map layer and Map workloadJim Flynn
Signed-off-by: Jim Flynn <jim.flynn@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Id2227c58809b84c7a7af61f7c0d88ad7d45ce558
2020-10-05Update ACL pin to fc2f6d0427e1d886fcccc68867d1af1ccd96608bTeresa Charlin
* Set use_padding to false in neon workload Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia5367de331efe1d28dea4dfbefc0713720da81f9
2020-10-02IVGCVSW-5334 Remove remaining boost::numeric_cast from armnnMatthew Sloyan
* Floating point casts now use armnn::numeric_cast. * Also removed remaining header imports. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I2d37847d67f164fc0a0ae17f34d49ff3d2210c30
2020-10-02IVGCVSW-5294 Remove boost::format armnn backendsJames Ward
* replaced with fmt::format * one case required std:stringstream instead Signed-off-by: James Ward <james.ward@arm.com> Change-Id: Ife7c4cf5f143e43373f42edf6124158af132abc5
2020-10-01Include layer GUID in SerializeToDot outputRob Hughes
Change-Id: I1a6df60683cc51fcd9739b6dc98f1e722becf045 Signed-off-by: Robert Hughes <robert.hughes@arm.com>
2020-10-01COMPMID-3784 Fix 1 CTS MUL INT32 failure due to using SATURATETeresa Charlin
* LargeGraph_TENSOR_INT32_Rank4/26 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9d07444db56e26c13a77bf022938644ed7953d6b
2020-10-01IVGCVSW-5325 Fix non-channel per axis quantizationFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Ie0cf69b2cd76d6ecedab43d3d9ae267d23bbc052
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