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2022-02-16Refactor Forced ImportFinn Williams
* Find and replace all workloads associated with imported IO * Only attempt tensorhandle replacement if supported by all workloads * Add new RefBaseWorkload to enable forced input for ref backend * Store imported tensorhandles in preImportedTensorhandles instead of outputHandles * Create pre-imported tensorhandles at network load-time * Front load import workload validation to load network time * Only call ReplaceTensorHandle when needed Change-Id: I3816a71b7f57ae90388bb16462a75d4ef3544fa7 Signed-off-by: Finn Williams <finn.williams@arm.com>
2022-01-18IVGCVSW-6682 Add ReplaceTensorHandle functions to IWorkload and BaseWorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9f80b9f45206db920568e28e363fcb60f5c0819a
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
Move the following header files from backendsCommon to armnn/backends. * MemCopyWorkload.hpp * TensorHandle.hpp * Workload.hpp * WorkloadData.hpp * WorkloadFactory.hpp Replace them with forwarding headers and a pragma deprecation message. Resolve the deprecation messages in Arm NN code. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
2021-12-14IVGCVSW-6453 'Move the ArmNN Test Utils code to a physically separate directory'Sadik Armagan
* Created include/armnnTestUtils directory * Moved Arm NN test utils files into armnnTestUtils directory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I03ac54c645c41c52650c4c03b6a58fb1481fef5d
2021-11-17IVGCVSW-6509 Front End + Reference Workload implementationTamás Nyíri
Subtask of story: IVGCVSW-6164 Add a Pooling3d FrontEnd and Ref Implementation * Add front end * Add reference workload * Add corresponding unit tests Change-Id: Icce4146dd0a06a1da46a2def00a82d343e171750 Signed-off-by: Tamas Nyiri <tamas.nyiri@arm.com>
2021-10-27IVGCVSW-6469 Add MirrorPad FrontEnd and Ref SupportMatthew Sloyan
* Added PaddingMode enum to PaddingDescriptor to enable Symmetric and Reflect padding. * Added Symmetric and Reflect Ref implementation. * Added Serializer & Deserializer support. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I4bed907b31742b32ccefe5e8ca39a6f1e5bd9dee
2021-10-20Add ConstTensorsAsInput support for Conv3dMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteParser. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added Conv3d EndToEnd test. * Added NCDHW DataLayout and unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I10cdd354ca5f1c748730f92ffdb36bf810f83c8e
2021-10-02IVGCVSW-5985 Remove deprecated codeJan Eilers
* Removes deprecated AddLayer, IsLayerSupported functions * Marks the whole LayerVisitor class as deprecated not just the constructor. This required to wrap all Accept functions in a no deprecate macro because the LayerVisitor is used as a parameter in there * Removes usage of deprecated LayerVisitor and replaces it with ExecuteStrategy. This required a few structural changes in the unit tests * Adds a default implementation for IStrategy called StrategyBase * Changes pyarmnn to use non deprecated constructor for INetworkProperties and adds related unit test * Marks usage of deprecated code in pyarmnn as deprecated. This required to extend INetworkProperties to allow backwards compatibility * Removes deprecated functions from CpuAcc, GpuAcc and Ref backends Note: This patch breaks compatibility with backends that are not updated in this patch !android-nn-driver:6325 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Id13b6f37a74d26eadeda2da1dc92915e725ed5a5
2021-10-01IVGCVSW-6163 Add Conv3d FrontEnd and Ref ImplementationMatthew Sloyan
* Added front-end * Added Reference workload * Added Serializer & Deserializer support * Added unit tests * Added NDHWC DataLayout Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Iec4d39e7433b5334d52fa44cf8efc6bcd39319d8
2021-09-24IVGCVSW-3705 Add Channel Shuffle Front end and Ref ImplementationSimon Obute
* Add front end * Add reference workload * Add unit tests * Add Serializer and Deserializer * Update ArmNN Versioning Signed-off-by: Simon Obute <simon.obute@arm.com> Change-Id: I9ac1f953af3974382eac8e8d62d794d2344e8f47
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-08-10MLCE-530 Add support for UnidirectionalSequenceLstm to RefWorkloadexperimental/daves_custom_allocator_dmabufNarumol Prangnawarat
* Add implementation of IsUnidirectionalSequenceLstmSupported to RefLayerSupport * Add RefUnidirectionalSequenceLstmWorkload * Refactor Lstm to be able to use for Lstm and SequenceLstm * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ibc066d213213a11b955dfefbe518de643298ba0c
2021-08-10IVGCVSW-6292 Allow profiling details to be switched off during profilingKeith Davis
* Add switch for network details during profiling Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I8bd49fd58f0e0255598106e9ab36806ee78391d6
2021-08-06IVGCVSW-6119 ConstTensorsAsInput: FullyConnectedMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Schema with IsConstant and ConstantTensorsAsInputs. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added dynamic or constant input EndToEnd tests. !android-nn-driver:5959 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibf3cf437df1100e4b322b0d303c575c6339f9696
2021-08-05IVGCVSW-5980 Add Descriptor, TensorInfo and Convolution algorithm to JSONKeith Davis
* Add GUID as field to layer details and profiling events * Add Optional GUID param to existing tests * Improve Details macro to be inline function * Fix some formatting Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I66f192a90a7642b3ee8e7dda0d3f428cce002581
2021-08-04IVGCVSW-5980 JSON profiling outputKeith Davis
* Add new ProfilingDetails class to construct operator details string * Add new macro which helps append layer details to ostream * Add ProfilingEnabled to NetworkProperties so that profiling can be realised when loading the network * Add further optional info to WorkloadInfo specific to convolutions * Generalise some JsonPrinter functions into JsonUtils for reusability * Remove explicit enabling of profiling within InferenceModel as it is done when loading network * Add ProfilingDetails macros to ConvolutionWorkloads for validation Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Ie84bc7dc667e72e6bcb635544f9ead7af1765690
2021-07-16Fix binding of reference to null pointer in RefFullyConnectedWorkloadMatthew Bentham
As the bias decoder is optional, pass it as a pointer to the FullyConnected function instead of by reference. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I0bd2e601015e7fa1ae21b50f6c3dd7eac4176554
2021-07-15Fix some compile warnings & errorsRob Hughes
* Fix type of literals * Add explicit casts * #include missing headers * Replace use of non-standard u_int8_t * Remove name of unused variables * Fix DLL export macro - this was broken when some of the exporting headers were moved to a different library. Change-Id: Ie569c8df41a077b46c608798f39526352e2aeb3a Signed-off-by: Rob Hughes <robert.hughes@arm.com>
2021-06-16MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add front end * Add reference workload * Serialization/Deserialization * Add unit tests * Update ArmNN Versioning Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I6fcb1fa341d6f08dea4003b13544e6e9f53fefd3
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-06-16IVGCVSW-5826 Change weights layout for depthwise to [1,H,W,I*M]Jan Eilers
* This change is necessary because tflite uses a [1,H,W,I*M] format and uses the I*M dimension for per axis quantization. Our previous layout [M,I,H,W] can't handle the correlating quantization scales. * Updates Onnx-, TfLiteParser and TfliteDelegate * Updates the CpuRef, CpuAcc and GpuAcc backends * Adjusts unit tests * Adds test to ensure models with old layout can still be read and executed * Adds conversion function to previous layout [1,H,W,I*M] --> [M,I,H,W] which can be used by backend developers !android-nn-driver:5553 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ifef23368b8c3702cf315a5838d214f7dc13c0152
2021-06-01IVGCVSW-5833 Move the ProfilingGuid out of Types.hpp to its own header in ↵Nikhil Raj
profiling common !android-nn-driver:5691 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib71af0831e324ac6bd27b1a36f4a6ec1a703b14a
2021-05-06IVGCVSW-5815 Generalise ConstCpuTensorHandleJames Conroy
* Generalises ConstCpuTensorHandle and inherited classes by removing 'Cpu' from aliases. * New renamed classes: ConstTensorHandle, TensorHandle, ScopedTensorHandle, PassthroughTensorHandle, ConstPassthroughTensorHandle. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I1824e0e134202735fb77051f20a7252f161dfe16
2021-05-05IVGCVSW-5418 ExecuteNetwork test for MobileBERTmathad01
* Fix bug in stack layer which causes mobileBERT model to seg fault when running in concurrent mode. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Ib2b73ffaa5b70147b837b7c764064e530baba637
2021-04-29IVGCVSW-5775 'Add Async Support to ExecuteNetwork'Sadik Armagan
* Enabled async mode with '-n, concurrent' and 'simultaneous-iterations' in ExecuteNetwork * Number of input files provided should be equal to number of input files provided multiply by number of simultaneous iterations divided by comma !armnn:5443 Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibeb318010430bf4ae61a02b18b1bf88f3657774c
2021-04-28IVGCVSW-5843 Separate memory managers for WorkingMemHandlesFinn Williams
* Add inter layer memory management to WorkingMemHandle * Change Const layers to be executed once in loadedNetworkConstruction and share tensorHandle between all WorkingMemHandles * Fix various reference workloads pointing to memory in the queueDescriptor Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I69d4b3c5c84d2f5abe4540c3e624ab4f00d88226
2021-04-28IVGCVSW-5416 'Add android-nn-driver support for CASTSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I02da912e5e4ca650b367ca40fe3f5ca5baa61cbb
2021-04-14IVGCVSW-5787 Add/Update Execute() implementations in RefActivationWorkloadFinn Williams
* Added multithreaded StridedSliceEndToEndTest Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I4579db7b5959e0a22256f1bda00238c22e611dec
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-04-09MLCE-328 Serializer/Deserializer does not support Signed64Mike Kelly
* Added support for Signed64 to flatbuffer's schema & updated source tree * Added support for Signed64 to TFLite Delegate * Added support for Signed64 to Serializer * Added support for Signed64 to Deserializer * Added unit test for ArgMinMax to Deserializer * Deprecated m_Output_Type from the ArgMinMaxDescriptor: the output type is solely determined by the DataType of the output Tensor * Fixed issue where RefArgMinMaxWorkload could output data using the wrong DataType * Added Signed64 to RefLayerSupport::IsArgMinMaxSupported as a supported type Signed-off-by: Mike Kelly <mike.kelly@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib622c052a1f8aa3e658262f8bde5a6881a8cbe10
2021-04-07Fix graph copy memory spikeFinn Williams
* Change layer storage of ConstTensors to std::shared_ptr<ConstCpuTensorHandle> * Change clone to share ConstTensor rather than copy * Remove uses of non-const GetTensor() call * Reduce scope of non-optimized network in ExeNet, so memory can be released after use Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Ibb2c7309d12411d21405bd6024c76bcdf5404545
2021-03-29IVGCVSW-5790 Merge async prototypeMike Kelly
* Added thread safe execution mechanism for armnn * Removed duplicate function bool Compare(T a, T b, float tolerance) * Added StridedSliceAsyncEndToEndTest * Fixed memory leak Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I2d367fc77ee7c01b8953138543e76af5e691211f
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and ↵Sadik Armagan
TfLiteDelegate support for FullyConnected Operator' * Added front-end support for non-const weights for FULLY_CONNECTED operator * Added FULLY_CONNECTED end-to-end test * Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights * Updated the version numbers Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
2021-02-11MLCE-347 Bug fixes in Reduce: QueueDescriptor.validate and init REDUCE_MINTeresa Charlin
* Allow input tensors of any rank in ReduceQueueDescriptor::validate * Fix VTS tests failing for REDUCE_MIN due to initialization Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id8fba1662ade4e0a967093fe5a53b275847f2393
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2020-12-17IVGCVSW-4625 Add CL Rank WorkloadDavid Monahan
* Added CL implementation of Rank Workload * Removed references to memcpy_s as it's a windows only function Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia63666b9640d76a775f2ab98b3cd7e9f77b5a507
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-10-23GitHub#465 Fix NonMaxSuppressionantkillerfarm
If visited flag set true, it should not be visited any more. For example, if we put 10 boxes (ordered by score) into NonMaxSuppression: * Step1: Suppose Box 2/3/6/8 are suppressed by Box 1. Box 4/5/7/9/10 survived. * Step2: Correct way: We use Box 4 to suppress the survive boxes. Prior to this commit: Box 4 may be suppressed by Box 2, even Box 2 is already suppressed by Box 1... Signed-off-by: Antkillerfarm <antkillerfarm@gmail.com> Change-Id: I38d7a84287649827a16565748592fb562b4df5d5
2020-10-13IVGCVSW-4489 Remove remaining occurrence of boost::formatMatthew Sloyan
* Replaced with fmt::format in Descriptors.cpp. * Removed remaining boost/format headers in ArmNN codebase. * Removed additional boost header in Network.cpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib98b83bf4ec99ef98ce7a3635ec0dd478c3e43e1
2020-10-02IVGCVSW-5334 Remove remaining boost::numeric_cast from armnnMatthew Sloyan
* Floating point casts now use armnn::numeric_cast. * Also removed remaining header imports. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I2d37847d67f164fc0a0ae17f34d49ff3d2210c30
2020-10-01IVGCVSW-5325 Fix non-channel per axis quantizationFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Ie0cf69b2cd76d6ecedab43d3d9ae267d23bbc052
2020-09-28IVGCVSW-5325 Speed up the reference backendFinn Williams
Change-Id: Id8bd0a0418be31d975b944b54bbacb25051ffb2e Signed-off-by: Finn Williams <Finn.Williams@arm.com>
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-09-17IVGCVSW-5300 Remove some boost::numeric_cast from armnn/backendsMatthew Sloyan
* Replaced with armnn/utility/NumericCast.hpp * Some exclusions in reference backend * Excluded as requires float implementation in NumericCast.hpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I9e4e9cd502c865452128fa04415fd6f250baa855
2020-07-06IVGCVSW-4624 Add a RANK Reference ImplementationFinn Williams
* Add Rank front end * Add Rank reference implementation * Add Rank serialization support * Add Scalar serialization support Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I06e4a468c2a84e79bae2e6c5348596bbbf853b4b
2020-07-01IVGCVSW-4903 Connect axis parameter in Gather from android to ACL.Teresa Charlin
!android-nn-driver:3302 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifbc49acb5272f8a36719bb68676e44817190537d
2020-06-30IVGCVSW-5007 Implement an Int32 reference Elementwise workloadFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I6592169b74ac4294bc09647879aec0718c641f91
2020-06-20IVGCVSW-4707 - Add AlignCorners and HalfPixelCenters to ResizeDavid Monahan
* Added AlignCorners and HalfPixelCenters Parameters to Resize * Added Unit Tests Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I83420a9bcb7beec9073d201448f64eb53090e1f1
2020-06-15IVGCVSW-4620 Add Fill Reference ImplementationRyan OShea
* Add Fill Reference Implementation * Refactor FP converter to use static_cast Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I532e2f982981d047690755fac43a0e9cf8b17dcd
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