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2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-08-31MLCE-530 Add support of int8 weight for UnidirectionalSequenceLstmNarumol Prangnawarat
to Ref backend and armnn delegate Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I203d0029c12221228ffe229acda3c90594394e9b
2021-08-10MLCE-530 Add support for UnidirectionalSequenceLstm to RefWorkloadexperimental/daves_custom_allocator_dmabufNarumol Prangnawarat
* Add implementation of IsUnidirectionalSequenceLstmSupported to RefLayerSupport * Add RefUnidirectionalSequenceLstmWorkload * Refactor Lstm to be able to use for Lstm and SequenceLstm * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ibc066d213213a11b955dfefbe518de643298ba0c
2021-08-06IVGCVSW-6119 ConstTensorsAsInput: FullyConnectedMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Schema with IsConstant and ConstantTensorsAsInputs. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added dynamic or constant input EndToEnd tests. !android-nn-driver:5959 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibf3cf437df1100e4b322b0d303c575c6339f9696
2021-07-29Fix use of non-standard datatypesRob Hughes
Change-Id: I03ef0571b24ad2bddfabf3bc5b11b614e7d7c8b4 Signed-off-by: Rob Hughes <robert.hughes@arm.com>
2021-06-21Remove remaining boost testsMatthew Sloyan
* Updated unit tests to use doctest. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I5231225cd0830f16cc0ef20e9ef27e7b92feab19
2021-06-16MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add front end * Add reference workload * Serialization/Deserialization * Add unit tests * Update ArmNN Versioning Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I6fcb1fa341d6f08dea4003b13544e6e9f53fefd3
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-06-16IVGCVSW-5826 Change weights layout for depthwise to [1,H,W,I*M]Jan Eilers
* This change is necessary because tflite uses a [1,H,W,I*M] format and uses the I*M dimension for per axis quantization. Our previous layout [M,I,H,W] can't handle the correlating quantization scales. * Updates Onnx-, TfLiteParser and TfliteDelegate * Updates the CpuRef, CpuAcc and GpuAcc backends * Adjusts unit tests * Adds test to ensure models with old layout can still be read and executed * Adds conversion function to previous layout [1,H,W,I*M] --> [M,I,H,W] which can be used by backend developers !android-nn-driver:5553 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ifef23368b8c3702cf315a5838d214f7dc13c0152
2021-06-11IVGCVSW-5963 'Move unit tests to new framework'Sadik Armagan
* Used doctest in ArmNN unit tests Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ia9cf5fc72775878885c5f864abf2c56b3a935f1a
2021-06-02IVGCVSW-5962 Remove boost::multi_arraySadik Armagan
* Replaced all instances of boost::multi_array with flat vectors. * Updated LayerTestResult struct with new member variables. * Updated CompareTensor function to compare flat vectors and the shape. * Removed MakeTensor function from TensorHelpers.hpp. * Removed GetTensorShapeAsArray function from LayerTestResult.hpp. * Removed boost::array usage. * Removed boost::extents usages. * Removed boost::random usages. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iccde9d6640b534940292ff048fb80c00b38c4743
2021-05-26IVGCVSW-6009 Integrate threadpool into ExNetKevin May
* Remove concurrent flag from ExecuteNetwork as it is possible to deduce if SimultaneousIterations > 1 * Add void RunAsync() * Refactor some unit tests Change-Id: I7021d4821b0e460470908294cbd9462850e8b361 Signed-off-by: Keith Davis <keith.davis@arm.com> Signed-off-by: Kevin May <kevin.may@arm.com>
2021-05-19IVGCVSW-5964 Removing some obsolete Boost references.Colm Donelan
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Ic0a2e62e3808caf89ee429ec184d947a04340248
2021-05-06IVGCVSW-5813 Add Async Queue to IRuntimeKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Icc0d131c8ee2e9748e2f14762a75962b39c10f9d
2021-05-06IVGCVSW-5815 Generalise ConstCpuTensorHandleJames Conroy
* Generalises ConstCpuTensorHandle and inherited classes by removing 'Cpu' from aliases. * New renamed classes: ConstTensorHandle, TensorHandle, ScopedTensorHandle, PassthroughTensorHandle, ConstPassthroughTensorHandle. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I1824e0e134202735fb77051f20a7252f161dfe16
2021-04-20IVGCVSW-5816 Constant memory accessFrancis Murtagh
* Add new class ManagedConstTensorHandle to Unmap when out of scope * Integrate into existing layers that have constants * Add unit tests Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I0a05e14e438804b37e9862e76b5ca329483f6b45
2021-04-14IVGCVSW-5787 Add/Update Execute() implementations in RefActivationWorkloadFinn Williams
* Added multithreaded StridedSliceEndToEndTest Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I4579db7b5959e0a22256f1bda00238c22e611dec
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-03-29IVGCVSW-5790 Merge async prototypeMike Kelly
* Added thread safe execution mechanism for armnn * Removed duplicate function bool Compare(T a, T b, float tolerance) * Added StridedSliceAsyncEndToEndTest * Fixed memory leak Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I2d367fc77ee7c01b8953138543e76af5e691211f
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and ↵Sadik Armagan
TfLiteDelegate support for FullyConnected Operator' * Added front-end support for non-const weights for FULLY_CONNECTED operator * Added FULLY_CONNECTED end-to-end test * Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights * Updated the version numbers Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
2021-02-19Give unique names to debug layersRob Hughes
Debug layers are given names based on the layer they take their input from. If a layer has multiple outputs then one debug layer will be attached to each output. Therefore all these debug layers would have identical names making them hard to distinguish when debugging. This patch includes the output slot index which the debug layer takes its input from when creating the name. Change-Id: I09eaa8a7edad9bfdf678b4778cf740340013126c Signed-off-by: Rob Hughes <robert.hughes@arm.com>
2021-02-15IVGCVSW-4873 Implement Pimpl Idiom for INetwork and IOptimizedNetworkFrancis Murtagh
!android-nn-driver:5042 Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Ia1ce8b839e81b46428ba0f78463e085e5906958d Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com>
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2021-02-08IVGCVSW-4873 Implement Pimpl Idiom for IRuntimeKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I52448938735b2aa678c47e0f3061c87fa0c693b1
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2020-12-16IVGCVSW-5595 Fix incorrect padding value for asymmetric quantized typeNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I85f0c30757043f8c27c78d607f0f9dbbdd35b9fb
2020-11-18Fix logical vts skipNarumol Prangnawarat
* Add Boolean support for Reshape * Use LogicalUnary factory and data type for LogicalNot Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I8e072fde200b7716556ae67f79616458cf98ff20
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-11-09IVGCVSW-5327 Add to Layer a binary blob to host the activation layer infoKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I0a07dea96a86849701ba387dbea148909a6d729b
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-08-31IVGCVSW-5256 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers Q,R & T Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I6fc613d31785298a0b7ed18f1abdd59bafed1e8e
2020-08-31IVGCVSW-5231 Remove CreateTensorHandle in the test where there is ↵Keith Davis
NO_DEPRECATE_WARN * Done for all elementwise layers, Activation, BatchNorm, BatchToSpace Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Id1d15a0960233026aecf7a07e0d3f006e07e4abf
2020-08-31IVGCVSW-5253 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers M-P Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I324eee7d750e30f714e0d346b7da7b69866ff935
2020-08-31IVGCVSW-5252 Use CreateTensorHandle() function from TensorHandleFactory in ↵Finn Williams
the tests for layers between G-L Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I197351a479fb211787bd12a73c9618d2ded95898
2020-08-31IVGCVSW-5249 Use CreateTensorHandle from ITensorHandleFactory in the test ↵Keith Davis
for all layers between C-D Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I9583adf50e67e63e73833f400d1c50fbff57f60c
2020-08-31IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-FFinn Williams
* Refactored Floor and FullyConnected tests Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Iad87254e638bdcb5d7b334b16ec87a0c981e48a0
2020-08-28IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SplaceToDepth, Splitter, Stack and StridedSlice unit tests to use TensorHandleFactory for creating TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ib22bb09cd2120c02c548099eaa06db6e6f00b15e
2020-08-27IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SoftmaxTestImpl to use TensorHandleFactory to create TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I83559a89187bbed0d6f34ca589ea81c694bf5683
2020-08-27IVGCVSW-5257 'Remove CreateTensorHandle in the test for layers beginning with S'Sadik Armagan
* Re-factored SpaceToBatchNd tests to use TensorHandleFactory to create TensorHandles Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I096a6e30ecc97dd9b93b206157f16d912085703c
2020-08-27IVGCVSW-5251 'Remove CreateTensorHandle for ArgMinMaxTestImpl'Sadik Armagan
* Refactored ArgMinMax tests to use TensorHandleFactory instead of WorkloadFactory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibff0f9370972f9a0a977c05275cb6168f8f88ae5
2020-08-26IVGCVSW-5250 Remove CreateTensorHandle in the test for layers between E-FFinn Williams
* Added new test function to pass in the ITensorHandleFactory Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I9b2e9250200e092541e29796ec53cabd0b677acf
2020-08-25IVGCVSW-5109 'Add SupportsInPlaceComputation to TensorHandleFactories'Sadik Armagan
* Added functionality to query if TensorHandleFactory supports InPlaceComputation Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Icf5bfc5f999fc5d03681dcb8cec88d921842458b
2020-08-16IVGCVSW-5216 Remove CreateTensorHandle from TransposeTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iea9cc3a36021aac4b86ea5d8340dd8eb1f308283
2020-08-15IVGCVSW-5218 Remove CreateTensorHandle from DetectionPostProcess and PreluFrancis Murtagh
* Remove default arguments in Neon and CL causing ambiguity Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I314885719a16311b68c7bda37cd54b2ca0d14480
2020-08-12IVGCVSW-4979 Add GetTensorHandleFactory to WorkloadFactoryHelper(Ref/Ne/Cl)Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7e4c752f396833e226d73c3569e195b796fbf482
2020-07-31IVGCVSW-4712 Fill layer datatype adjustmentsTeresa Charlin
* Input layer to be int32 instead of same type as output * Enable float16 end to end tests * Neon and Cl layer support check for backend Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6bc889077c8da63eeff66bd45730ce5d8783c419
2020-07-30IVGCVSW-5174 Fix i386 Floor and AbsTestFrancis Murtagh
* Remove QSymm16 support for Floor to match NNApi and disable RefLayerTest * Return nullptr for floor workload if quantized type * Fix SimpleAbsTest incorrect output Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I80d9e2fb78777d0a3fc7ce6d12b5eb4af3fd1d3a
2020-07-30IVGCVSW-4713 Add EndToEnd test for RANKTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia8f237a2500986e01843defb75787694a20ba24c
2020-07-28IVGCVSW-4712 Add EndToEnd test for FILLTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic89bcbbd580abe1b05bd26748db704e83cf65bea
2020-07-24IVGCVSW-4889/IVGCVSW-4890 CL/Neon UnitTests for align_corners & half_pixelsTeresa Charlin
*Add more UnitTests to the reference implemenation. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Idbce68baa76b049e5f741f790a5cfd75acb54a95
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