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2022-12-15Change the semantics of RefTensorHandle::Import to 'overlay' existing memoryMatthew Bentham
This makes it possible to call Import on an Allocated() or memory-managed Tensor, which is needed for the current implementation of OptimizerOptions::m_ExportEnabled to work (as the last layer before the OutputLayer needs to be able to Import the user's OutputTensor, but this is done after other memory allocation). Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I1a885c2da7b1f0f3964ae53b8135b5e96a66614f
2022-12-14Refactor: Remove m_ImportFlags from RefTensorHandleMatthew Bentham
The import flags for a RefTensorHandle shouldn't be a data member, as RefTensorHandle can only import from MemorySource::Malloc. Instead, use m_ImportEnabled to determine what to return from GetImportFlags(). Simplifies the code in Import and CanBeImported. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: Ic629858920f7dd32f99ee27f150b81d8b67144cf
2022-12-12Updates following execution of Includewhatyouuse on armnn/include.Colm Donelan
This tool forces explicit includes of all dependencies and highlights unused dependencies. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I92e449245246452a0227cbd13f9c082e2088bf8c
2022-12-08IVGCVSW-7168 Add Conv2d and Constant support to TOSA Reference BackendMatthew Sloyan
* Added TOSA Conv2d and Constant mappings. * Added unique naming to mappings based on previous and following layers, so they are connected correctly. * Updated existing mappings with new naming convention. * Added all mappings to one main block in OptimizeSubgraphView. * Removed isMain from mapping functions. * Added Conv2d EndToEnd test. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I27c3e238407c32379ce25a1f01dad11523ef5d2b
2022-12-07IVGCVSW-6853 Rewrite BuildArmComputePermutationVector()Teresa Charlin
* Some pemutation vectors were not converted correctly. * Add Transpose end to end test. * Comments added with an example to clarify the differences betweeen Transpose and Permute Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c0954ca6ce00ef5f2a6f3625abe6f4fd27b5cdf
2022-12-05IVGCVSW-4926 Add support in CpuRef implementation for Gather for axis ↵Nikhil Raj
different to 0 !android-nn-driver:8727 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4336007ad5a8552f7893ce6253f93cf9d1f5474f
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-11-01IVGCVSW-6496 Add EndToEnd Layer test for Batch MatMul WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6a541db9a602609282cc6f33af930ca141b83c41
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Add functionality to print output tensors to file in tempdir * UnitTests Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Idfb4c186544187db1fecdfca11c662540f645439
2022-08-30IVGCVSW-7105: BatchMatMul Optional Parameter SupportSamuel Yap
* Added transpose parameters to pre-transpose each input tensor's slices * Added adjoint parameters to pre-adjoint each input tensor's slices * Small refactoring (BatchMatMulDescriptor static helpers and BatchMatMulImpl constructor) * Updated input validation and output shape inference for parameters * Additional layer unit tests for parameters added * Versionings incremented Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ibe5242a8a5bf604c13de0dc65844fd6c421cc667
2022-07-27IVGCVSW-7109: Add Batch MatMul front end support - ReferenceSamuel Yap
* Descriptors added for BatchMatMul * Layer definition added * Input validation added (will likely change when opt. param support comes in) * Ref workload implementation for BatchMatMul added (will also change with opt. param support) * Ref layer tests made for BatchMatMul * CMake and other build files updated Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ic885301da543ee0fbe7922b85e7f9658c4efc617
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-05IVGCVSW-6127 ConstTensorsAsInput: DepthwiseConvolution2dCathal Corbett
!android-nn-driver:7418 * Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Change NNDriver to new API. * Updated Ref. * Neon and Cl backend partially completed (Backend.cpp files). * Added dynamic or constant input EndToEnd tests. * Added ConstantTensorAsInputMemeberVariableRedirect Optimization. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ib18b6c10a093042e165e25237dc04a4c67ba82da
2022-05-05Revert "IVGCVSW-6937 Add INT32 support to FLOOR"Teresa Charlin
This reverts commit 38b72e8de898d84a1481e242803da61009719891. * It is not longer needed as this functionality is cover with the commit: IVGCVSW-6938 Do not add Floor when FloorDiv is int32 in Tfliteparser Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iac757cf9b47d2516804dca2efb347cfbd3282f14
2022-05-04IVGCVSW-6937 Add INT32 support to FLOORTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6f7cddb2d23c67ae682132d18f98776c074dcb3b
2022-05-03IVGCVSW-6856 Add GATHERNd FrontEnd and Ref ImplementationTeresa Charlin
* Add front end * Add reference workload * Add unit tests * Add EndToEnd test Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4cebd17b18476df86162e2dda3366c10e80bd2f8
2022-04-13IVGCVSW-6174 Add Cl Pooling3d WorkloadRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new ClPooling3dWorkload header and source files * Add Pooling3d workload to ClWorkloads.hpp * Add tests for Pooling3d workload * Add Pooling3d build function to ArmComputeTensorUtils Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500 Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
2022-03-23IVGCVSW-6706 Move headers to profiling/client/includeJim Flynn
!android-nn-driver:7337 Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2022-03-08IVGCVSW-6772 Eliminate armnn/src/backends/backendsCommon/test/MockBackend.hppCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ie99fe9786eb5e30585f437d0c6362c73688148db
2022-03-03Revert "Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Neon"" This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed. Reason for revert: 22.02 release. Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
2022-02-23IVGCVSW-6803 Add int32 support for CONCATENATION in CpuRefTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id9decafcebb6dbcac3a03516281524f22419cbfb
2022-02-23Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Neon" This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16. Reason for revert: cannot update ACL pin until 22.02 release. Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
2022-02-21IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 to NeonCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
2022-02-11Fix unit test where NeonMemoryManager was used instead of RefMemoryManagerMatthew Bentham
Although the Neon and Ref backends can use each other's TensorHandles, their TensorHandleFactories can't use each other's MemoryManagers. Incorrectly passing the NeonMemoryManager to the RefTensorHandleFactory in unit test utility code resulted in an incorrect static_pointer_cast and a warning from the Undefined Behaviour Sanitizer. This change fixes the test code, and replaces use of static_pointer_cast with armnn::PolymorphicPointerDowncast which will check that the cast is legal in debug builds. Also, remove MockWorkloadFactoryHelper.hpp as it is unused. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I2b425e86fccacd7cc5ff186521fc6e53e7e50c77
2022-02-07IVGCVSW-6635 Move MemCopyTestImpl from acl to armnnTestUtils.Colm Donelan
* Move MemCopyTestImpl.hpp from src/backends/aclCommon/test/ to include/armnnTestutils. * Refactor MemCopyTests in aclCommon, cl and Neon. * Introduce RefMemCopyTests to exercise this utility in x86 builds. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8824f013d3656658ed0a2904bb79384e3af68641
2022-02-07IVGCVSW-6698 EndToEnd tests on ref to ensure allocated data can be reusedDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I2cda579d18be765fbc2783d9fd80ff8e5372a8a8
2022-02-03IVGCVSW-6696 Add Forced Import EndToEnd tests to Ref, Neon, and CLDavid Monahan
* Created EndToEnd tests with Misaligned buffers but import is forced * Added the Aligned Tests from a previous patch to avoid merge conflicts * Previous Aligned EndToEnd test for ref has been added to backendsCommon and is now used for neon as well * Added to Ref, Neon, and Gpu Backends * Neon tests only check for copies as reconfigure has not been implemented for the Neon backend yet Signed-off-by: David Monahan <David.Monahan@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I12ddf5780201044834d6d1bbeebce60a4614efd1
2022-01-31IVGCVSW-6552 Add support of aligned host memoryNarumol Prangnawarat
* Add AllocatedData functions to OutputHandler * Enable import aligned memory in ImportInputs * Enable import aligned memory in ImportOutputs * Allow to import input and output if the memory is aligned * Implement Reconfigure function on ClConvolution2dWorkload * End-to-end test on Ref and Cl to ensure that input and output memory are imported when aligned Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
2022-01-25IVGCVSW-6676 Register CopyAndImportFactoryPairs to RefBackend and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9d695418fe240b7115a1c624abcd459f1459301b
2022-01-21Fix build using gcc-5Rob Hughes
It seems the compiler was interpreting 'DataType' as the template argument rather than the type name. By fully qualifying the type name, it avoids this ambiguity. Change-Id: Iab00b0a22390417a5a6b22c829a171152f2da495 Signed-off-by: Rob Hughes <robert.hughes@arm.com>
2022-01-18IVGCVSW-6682 Add ReplaceTensorHandle functions to IWorkload and BaseWorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9f80b9f45206db920568e28e363fcb60f5c0819a
2022-01-18MLCE-736 'Adding support for TfLite Models'Sadik Armagan
* Added constant input supports for Pack/Stack, Concatenation operators * Added Int32 support to Pack/Stack operator on CpuRef * Removed unsupported operator from TfLite Delegate Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I64203e174300d23eedeb22bddefe07e931c4eff3
2022-01-17IVGCVSW-6672 Implement CanBeImported function to RefTensorHandleNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Icaa3aa7ef3e5cc3984941d095edfe8f0b2137879
2021-12-17IVGCVSW-6694 Disable long running Pooling3D unit test cases.Colm Donelan
* Disable the following test cases: LargeTensorsAveragePooling3d LargeTensorsAveragePooling3dUint8 LargeTensorsAveragePooling3dInt16 Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I908ce880b4d55598e913fc6b186f2bd2e796c613
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
Move the following header files from backendsCommon to armnn/backends. * MemCopyWorkload.hpp * TensorHandle.hpp * Workload.hpp * WorkloadData.hpp * WorkloadFactory.hpp Replace them with forwarding headers and a pragma deprecation message. Resolve the deprecation messages in Arm NN code. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
2021-12-14IVGCVSW-6453 'Move the ArmNN Test Utils code to a physically separate directory'Sadik Armagan
* Created include/armnnTestUtils directory * Moved Arm NN test utils files into armnnTestUtils directory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I03ac54c645c41c52650c4c03b6a58fb1481fef5d
2021-11-17IVGCVSW-6509 Front End + Reference Workload implementationTamás Nyíri
Subtask of story: IVGCVSW-6164 Add a Pooling3d FrontEnd and Ref Implementation * Add front end * Add reference workload * Add corresponding unit tests Change-Id: Icce4146dd0a06a1da46a2def00a82d343e171750 Signed-off-by: Tamas Nyiri <tamas.nyiri@arm.com>
2021-11-08IVGCVSW-6420: Constant flag in tensor info is not set correctlyCathal Corbett
!android-nn-driver:6532 !armnn-internal-tests:372451 * Made fix to 2 out of 3 ConstTensor() constructors in Tensor.hpp to throw InvalidArgumentException when TensorInfo isConstant parameter is false. * Added new ConstTensor() constructor in Tensor.cpp to accept vector<>.data() using template<typename MemoryType>. * Fixed runtime->GetOutputTensorInfo()/GetInputTensorInfo() methods and called submethods to return TensorInfo& rather than TensorInfo. * Fixed all failing unit tests for CpuRef/CpuAcc/GpuAcc to ensure any ConstTensor created has it's TensorInfo isConstant set to true. * Added unit tests in TensorTest.cpp to ensure ConstTensor constructors throw InvalidArgumentException when TensorInfo isConstat parameter is false. * Added unit test to ensure an empty ConstTensor constructor will set TensorInfo isConatant to true. * Indentation fixes. * Fix to arm_tensor.i to add isConstant parameter to TensorInfo constructor. Added methods IsConstant() and SetConstant(). * Fix to const_tensor.py to throw ValueError when TensorInfo isConstant is set to false when constructing a ConstTensor. * Fixed PyArmnn unit tests to set TensorInfo isConstant to True when ConstTensor is used. * Added unit tests in test_const_tensor.py to ensure ConstTensor constructors throw ValueError when TensorInfo isConstat parameter is false. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I44e440dd0422c366d31bbdbc77ad2b4db0bde148
2021-10-27IVGCVSW-6469 Add MirrorPad FrontEnd and Ref SupportMatthew Sloyan
* Added PaddingMode enum to PaddingDescriptor to enable Symmetric and Reflect padding. * Added Symmetric and Reflect Ref implementation. * Added Serializer & Deserializer support. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I4bed907b31742b32ccefe5e8ca39a6f1e5bd9dee
2021-10-20Add ConstTensorsAsInput support for Conv3dMatthew Sloyan
* Constant weights and biases are now stored as Constant layers. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteParser. * Updated Ref backend to handle constant weights and bias as inputs rather than reading from member variables. * Added Conv3d EndToEnd test. * Added NCDHW DataLayout and unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I10cdd354ca5f1c748730f92ffdb36bf810f83c8e
2021-10-14IVGCVSW-6416 AddFullyConnected API crashes without connected weights/bias layersCathal Corbett
* Created method in Graph.cpp/hpp ConstructErrorMessageForUnconnectedInputs() to verify weights and bias are set for FullyConnected layers. * Above method called in Graph.cpp InferTensorInfos() to print a more descriptive message when the weights or bias for a FullyConnectedLayer is not set. * Added try-catch in TestUtils.cpp Connect() to ensure input slot is available when connecting two layers. This ensures we catch the case where bias is is not enabled and we try and set a bias layer. * Added unit tests to check for LayerValidationError when weights or bias is not set on a FullyConnectedLayer. * Added unit test to check for LayerValidationError when bias is not enabled and we try and connect bias to FullyConnected Layer. * Seperated FullyConnected EndToEnd unit test method into two methods. First, performs tests on EndToEnd examples asserting output value. Second, performs tests on error catching. * Added comments to created methods. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I5207d8c5ebacfff598556742ccd4f53eef7dee0c
2021-10-08IVGCVSW-6417: Catch AddFullyConnected API error when weights TensorInfo ↵Cathal Corbett
isn't set * Updated code in Graph.cpp InferTensorInfos() to be more descriptive. * Added method VerifyConstantLayerSetTensorInfo() in Graph.cpp/hpp to error when ConstantLayer TensorInfo is not set. * Updated Optimize() in Network.cpp to call VerifyConstantLayerSetTensorInfo(). * Added unit test with ConstantLayer TensorInfo not set to catch error in VerifyConstantLayerSetTensorInfo(). * Added comments around method VerifyConstantLayerSetTensorInfo(). Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I366596243f7c5823676222e2d0cce1335bc8c325
2021-10-01IVGCVSW-6163 Add Conv3d FrontEnd and Ref ImplementationMatthew Sloyan
* Added front-end * Added Reference workload * Added Serializer & Deserializer support * Added unit tests * Added NDHWC DataLayout Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Iec4d39e7433b5334d52fa44cf8efc6bcd39319d8
2021-09-30IVGCVSW-6293 Add Unit test int8 Channel ShuffleTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Icf69b4c707014c5ae76425ad326bd2826381f305
2021-09-29IVGCVSW-3716 Add EndToEnd Layer test for Channel Shuffle WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I43d052d020f90c13688901929cd22c715471ef4f
2021-09-24IVGCVSW-3705 Add Channel Shuffle Front end and Ref ImplementationSimon Obute
* Add front end * Add reference workload * Add unit tests * Add Serializer and Deserializer * Update ArmNN Versioning Signed-off-by: Simon Obute <simon.obute@arm.com> Change-Id: I9ac1f953af3974382eac8e8d62d794d2344e8f47
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-08-31MLCE-530 Add support of int8 weight for UnidirectionalSequenceLstmNarumol Prangnawarat
to Ref backend and armnn delegate Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I203d0029c12221228ffe229acda3c90594394e9b
2021-08-10MLCE-530 Add support for UnidirectionalSequenceLstm to RefWorkloadexperimental/daves_custom_allocator_dmabufNarumol Prangnawarat
* Add implementation of IsUnidirectionalSequenceLstmSupported to RefLayerSupport * Add RefUnidirectionalSequenceLstmWorkload * Refactor Lstm to be able to use for Lstm and SequenceLstm * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ibc066d213213a11b955dfefbe518de643298ba0c
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