| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-01-31 | IVGCVSW-6552 Add support of aligned host memory | Narumol Prangnawarat | |
| * Add AllocatedData functions to OutputHandler * Enable import aligned memory in ImportInputs * Enable import aligned memory in ImportOutputs * Allow to import input and output if the memory is aligned * Implement Reconfigure function on ClConvolution2dWorkload * End-to-end test on Ref and Cl to ensure that input and output memory are imported when aligned Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718 | |||
| 2022-01-26 | IVGCVSW-6683-6684 Add ClBaseWorkload and NeonBaseWorkload | Teresa Charlin | |
| * Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload * Unit Test for ReplaceTensorHandle functions Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I985e34b93a96405735402a6d3b947957afbe2857 | |||
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index : armnn.git | |
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