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2019-07-02IVGCVSW-3307 Introduce RefTensorHandleMatthew Bentham
Use it for intermediate tensors on reference backend. Lays the groundwork for memory management in the reference backend. Change-Id: I7d3ee132cac31bde70ae6e1b815f4f0b03d550a6 Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-01IVGCVSW-3361 Add end-to-end tests for Resize on CpuRefAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ie89dc91a2fc0281d58c6f1ccef65ed1228d33ccb
2019-07-01IVGCVSW-3365 Add reference workload support for ResizeLayerTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id551690065dca0686ce597d1f0c14fd73163481e
2019-06-28IVGCVSW-3363 Add frontend support for Resize LayerTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I63493ddb7598515773073deb6db2eb3a635c5dfe
2019-06-27IVGCVSW-3324 Add end-to-end tests for TransposeConvolution2d on CpuRefAron Virginas-Tar
* Added one end-to-end test for all supported data types and data layout * Implemented RefLayerSupport::IsTransposeConvolution2dSupported() * Fixed formula used in TransposeConvolution2dLayer::InferOutputShapes() Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: If1ba3c226ecfa17f7fceffae857f39297c6433f2
2019-06-27IVGCVSW-3320 Add reference workload support for TransposeConvolution2dLayerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Icc64f8148c9d8a0d14d772e6e4e7865e70585cd9
2019-06-26Update the CL pin to the latest masterFerran Balaguer
* Update SoftMaxUint8Workload for CL and NEON to deal with quantization parameters as vectors. * Change Sigmoid Activation function QAsymm8 tests to use scale=1.f/256.f and offset=0 as quatization output parameters. !android-nn-driver:1417 Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: Ief91f10193fbbbad0c0124ece41f0bf4e0dcd992
2019-06-26IVGCVSW-3347 Add EndToEnd test for BatchToSpaceNdFrancis Murtagh
* Add Simple and complex end to end tests based on tensorflow.org examples Change-Id: Ifa758a48cf5ea09f9be7945859cd37377dbb9465 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-06-26IVGCVSW-3249 Extend the BatchToSpace workload to support QSymm16Francis Murtagh
* Add reference supportedness validation checks. * Call unit tests with QSymm16 data type. Change-Id: Ie6621ca7072dfc69278198c53e09b090275a7fff Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-06-25IVGCVSW-3250 Extend the Gather workload for QSymm16 supportEllen Norris-Thompson
* Add LayerTests and EndToEndTests for QSymm16 * Updated GatherQueueDescriptor::Validate function * Reimplemented RefLayerSupport::IsGatherSupported Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: I5b4df55d31b5ee3c5563d2df17b412a387c27595
2019-06-25IVGCVSW-3334 Refactor BatchToSpace tests to be genericFrancis Murtagh
* Generify and reformat test BatchToSpace tests * Add missing RefCreateWorkload test Change-Id: I08af018c07ee41df5b9d1e578d99bc03f38090ac Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-06-24IVGCVSW-3235 Add scalar to use as padding value in Reference PadDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: If050f318fcb7626bbfae1b8737a1d232a4a5a915
2019-06-24IVGCVSW-3277 Refactor TensorHandle factory APIDerek Lamberti
* Added backend support for multiple types of TensorHandle factories * Refactored the backend API to enable new tensor strategies * Added mechanism to determine memory strategies during optimization * Perform mem-copy only when Direct access is not found * Explicitly deleted the copy-constructor from OutputSlot to prevent accidental local copies that would cause the DisconnectAll to be called by the destructor Change-Id: I7e812c8e5e6c1c20db1c5932749ac70fd93db7f8 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com> Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-24IVGCVSW-3263 - Add End to End tests for SpaceToDepth on RefKeith Davis
Change-Id: I35d1c06b34ca160895f902255a69b87b711275b7 Signed-off-by: Keith Davis <keith.davis@arm.com>
2019-06-24IVGCVSW-3267 Add more code coverage to the PReLU layerMatteo Martincigh
* Added more unit tests to cover all code branches * Moved the InferOutput tests to separate files * Created convenience ARMNN_SIMPLE_TEST_CASE macro * Created TestUtils file for common utility functions Change-Id: Id971d3cf77005397d1f0b2783fab68b1f0bf9dfc Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-24IVGCVSW-3247: Refactor reference Gather workloadEllen Norris-Thompson
* Refactored Gather reference workload to not use templates for different types * Added quantization values in Gather unit tests for Quantized types Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: Ibe5d655aa1c287824e45b83818c5862bda7f92b0
2019-06-21IVGCVSW-3319 Add frontend support for TransposeConvolution2d LayerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ic06f63f1eff255e697facf319e2ac4c83d782e7c
2019-06-19IVGCVSW-3271 Add unit test for dilated DepthwiseConvolution2dTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0e7132f61001f7b2a9fad3d7b21acf2558c01df4
2019-06-19IVGCVSW-3231 Add reference workload support for SpaceToDepthKeith Davis
* Added reference workload for SpaceToDepth * Added unit tests for float32 & uint8 * Minor sort refactoring to RefWorkloads.hpp to alphabetical order Change-Id: I2e01f8101650e2aae102a8a32bc0064f067141ab Signed-off-by: Keith Davis <keith.davis@arm.com>
2019-06-19IVGCVSW-3268 Add Reference workload support for the new Prelu Activation layerMatteo Martincigh
* Added reference workload for the PReLU Activation layer * Added factory methods * Added validation support * Added Int16 support * Added unit tests Change-Id: Ic950d908c5e0a335dccd2960a3ffab0f8b599876 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-18IVGCVSW-3234 Add unit test for Concat with different quantization paramsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ia655b1b6c5f57d2b7c0d9dd17be342cd01f36c09
2019-06-18IVGCVSW-3264 Add Unit Test for Dilated Convolution2d to armnnTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I60da1414ab41ea196cdebc27f0f014a502274fa8
2019-06-17IVGCVSW-3267 Add Arm NN front end support for the new Prelu Activation layerMatteo Martincigh
* Added new PreluLayer class * Made necessary changes to ILayerSupport, ILayerVisitor, etc. * Added unit tests Change-Id: Ifcfb78e823bb5a245ed1dad15290d2f60115c882 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-17IVGCVSW-3286 Add epsilon Reference workload supportFerran Balaguer
Change-Id: I5cabbf9d1ef3858be68d6820d14845e512128c5b Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
2019-06-17IVGCVSW-3219: Add QSymm16 support to the ResizeBilinear Reference workloadEllen Norris-Thompson
* Adds CreateWorkload and LayerTests for QSymm16 * Updated ResizeBilinearQueueDescriptor::Validate function * Reimplemented RefLayerSupport::IsResizeBilinearSupported Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: Id9d14d3b41d26ac3d51227ab248ce8cca9dc9969
2019-06-17IVGCVSW-3221 Refactor Mean ref workload and testsJames Conroy
* Renamed RefMeanFloat32Workload and RefMeanUint8Workload to RefMeanWorkload, updated references to reflect this change. * Refactored RefFloorWorkload to use Decoders/Encoders, to support the use of multiple data types. * Deleted reference Unit8 Mean tests as they were duplicates of the Float32 tests. Refactored these tests to support multiple data types and updated references. * Adjusted the values used in the tests' input tensors so that they are more like floating point numbers e.g. change 1.0f to 1.5f. * Replace size_t with unsigned int in Mean ref workload, for better compatibility with the Encoder/Decoder, removed some unnecessary casts after this. * Added ValidateTensorDataTypesMatch() function to WorkloadData.cpp, added CreateIncorrectDimensionsErrorMsg function to RefLayerSupport.cpp. * Added passing and failing tests for ref IsMeanSupported. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id3d44463d1385255c727a497d4026d21a49e7eb2
2019-06-14IVGCVSW-3225 Add QSymm16 support for Rsqrt workloadnikraj01
Change-Id: I83b8494af24ff271dc4cd609944a1c5c55c405e0 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-06-14IVGCVSW-3275 Add Uint8 support for L2NormalizationFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I7f2bcf0596a4f654166aad9657bc7084f55e7451
2019-06-14IVGCVSW-3229 Refactor L2Normalization workload to support multiple data typesFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I848056aad4b172d432664633eea000843d85a85d
2019-06-14IVGCVSW-3224 Add Uint8 support for Rsqrtnikraj01
Change-Id: I45598fc9b6d408b19d8d050e64c12b1d48535fa3 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-06-12IVGCVSW-3217 Refactor the Layer tests for ResizeBilinear to make them genericEllen Norris-Thompson
* Refactored the ResizeBilinear tests so can be used for both Float32 and Uint8. * Moved to .hpp file and renamed tests accordingly. Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: Icf79b0616db0c307cfcf94747fe0a6d4343588bd
2019-06-12IVGCVSW-3010: Unit Test for Activation Workload for Float32 and Uint8konsof01
Unit tests for following Activations have been added *Relu *SoftRelu *LeakyRelu *Abs *Sqrt *Square *Tanh Signed-off-by: Konstantin Sofeikov <konstantin.sofeikov@arm.com> Change-Id: I2812a24842400c8b2c2d87933fbe1eca8c66e911
2019-06-12IVGCVSW-3258 Add front end support for new SpaceToDepth layerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id677e29a734f2b36483d939ad370079bdc11551e
2019-06-06IVGCVSW-3143 Extend the Pooling 2d workload to support QSymm16Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4026a77377002f4f9c15a923e8fcb7075d700f6e
2019-06-06IVGCVSW-3227 Extend the reference normalization workload to support QSymm16Matteo Martincigh
* Added support for QSymm16 * Added unit tests Change-Id: I7ba57793830bed7958ac9a94e9ac39d6dbe708b5 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-06IVGCVSW-3226 Refactor the reference normalization workloadMatteo Martincigh
* Refactored RefNormalizationFloat32Workload into RefNormalizationWorkload * Added ref support of Uint8 norm workloads * Added workload unit tests for Uint8 Change-Id: I063ce919c267e02a32e739848e49d75fd98a5eb6 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-06IVGCVSW-3142 Refactor reference Pooling2d workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I94c973ab747309c0214268c9c39f6d8f3fc7b255
2019-06-05IVGCVSW-2971 Support QSymm16 for DetectionPostProcess workloadsAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I8af45afe851a9ccbf8bce54727147fcd52ac9a1f
2019-06-05IVGCVSW-3216 Make Rsqrt f32 layers test genericnikraj01
Change-Id: Ibb8b71058039d0fb7345c2e6cba6382023541269 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-06-04IVGCVSW-3213 Extend the Reference BatchNormalization workload toMatteo Martincigh
support the new QSymm16 type * Added QSymm16 to the range of supported types for batch normalization ref workloads * Added unit tests for QSymm16 Change-Id: I5b2fcfbd9cb5af149ebfe24e2d95f3affa2e3690 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-04IVGCVSW-3212 Refactor the Reference BatchNormalization workloads toMatteo Martincigh
handle Float32 and QAsymm8 types * Removed the type-specific workload implementations * Added type-independent RefBatchNormalizationWorkload implementation * Reworked BachNormImpl to use decoders/encoders * Improved the validation of the BatchNorm queue descriptor * Fixed unit tests where necessary Change-Id: Icf3fa1332292d38ec2fa0b1cb984cab78426034b Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-04IVGCVSW-3179 Extend floor workload to support QSymm16James Conroy
* Added support for QSymm16 in Floor workload * Added unit test for QSymm16 Floor Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I6d36a07b3cfff212056125232f7842ca04bf4947
2019-06-03IVGCVSW-3148 Add end to end test for Dequantize layer to Ref, Cl, NeonNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Iaf9c290c093b7d84949993439568e55433938b4e
2019-05-31IVGCVSW-3177 Refactor Floor reference workloadJames Conroy
* Renamed RefFloorFloat32Workload to RefFloorWorkload and updated references to reflect this change. * RefFloorWorkload now uses Decoders/Encoders and supports the use of multiple data types. * Deleted FloorTestImpl.hpp and moved its contents into LayerTests.hpp. Change-Id: Ie079d05f2f6a578172f0fe3024f9607c030bce64 Signed-off-by: James Conroy <james.conroy@arm.com>
2019-05-31IVGCVSW-3195 Extend reference SpaceToBatch workload to support QSymm16nikraj01
Change-Id: I253eee2bbe1f48b94b03936af8f18603c1d58986 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-05-31IVGCVSW-3171 Extend the Strided Slice Ref workload to support the QSymm16Matteo Martincigh
* Added support for QSymm16 in the Strided Slice workload * Added unit tests Change-Id: I84485bc2fd5ad2b4edb49c644b644878e0e5aded Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-05-31IVGCVSW-3170 Refactor the Strided Slice Ref workload for Float32 andMatteo Martincigh
QAsymm8 types * RefStridedSliceWorkload is no longer a template class * Refactoring of the ref StridedSlice implementation * Added ValidateTensorQuantizationSpace function Change-Id: Ifa182a33d79d42137731f48b995a7973c9d92152 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-05-30IVGCVSW-3159 Support QSymm16 for Splitter workloadsRuomei Yan
Change-Id: I9af5d2d8ade97b9ecd2e6fbf13db9fa3bb622ed8 Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
2019-05-30IVGCVSW-2771 Add more end to end tests for splitter on Cl, Neon, RefNarumol Prangnawarat
to cover different number of dimensions and split axis Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ia9a111c8dcfc08d04b54aa770d1ae5312c6b1c93
2019-05-29IVGCVSW-3173 Extend reference softmax workload to support qsymm16nikraj01
Change-Id: I9ad5a04368a4587588d733ac36ad157f79b6c432 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-10 01:48:19 +0000