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2024-02-28IVGCVSW-8229 & IVGCVSW-8237 ScatterNd: Front end and reference implementationTianle Cheng
(scatter_nd, scatter_nd_add, and scatter_nd_update, scatter_nd_sub, scatter_nd_min, scatter_nd_max, scatter_nd_mul) * Front end support for ScatterNd added. * Reference implementation for ScatterNd added. * Unit tests added. Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I30da9056d9b03ca9b5fb8d09987341128badbcf4
2024-02-22IVGCVSW-7854 Remove/rewrite asserts in the backends unit tests.Colm Donelan
* Replace calls to ARMNN_ASSERT with DOCTEST CHECK. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8904d169b2099d57a344e319b2f14cf5d8392ae8
2024-02-07IVGCVSW-7622 GpuFsa Op: Add Cast operatorTracy Narine
* Added cast operator support Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie12cb1559a7a059ff35e1c395bc77243499243cd
2023-11-10IVGCVSW-7835 Add ReverseV2 CL and Neon WorkloadsTianle Cheng
* Added ReverseV2 to CL and Neon backends * Added Cl and Neon ReverseV2 Layer unit tests Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646275c629caf17dac1950b0cd7083f23f87f387
2023-10-12Revert "Revert "MLCE-1093 Reshape and concat invalid results""Mike Kelly
This reverts commit 008270f8c1359a7d62c2f881326b4d3f0d8b7b56. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: If8f5151aa349ff3834f03391e813669e5c51ed66
2023-09-29IVGCVSW-8055 Add support for GELU activation function.Teresa Charlin
* Add support to CpuRef, CpuAcc and GpuAcc * Add support to tflite parser, classic and opaque tflite delegates * Add support to serializer and deserializer * Add Unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc60ef2ef2a051e6d9af6e15d24c46316ec19de4
2023-09-28IVGCVSW-7504 Create a backend specific optimization to fuse ↵Tracy Narine
ADD+MUL+Add+(Activation) in CpuAcc * Adding CpuAcc backend optimization to fuse add+mul+add into one layer * Tests added/enhanced * Also added optional extended parameter to Graph::Print() and throw macros that could be used in place of assert Signed-off-by: Tracy Narine <tracy.narine@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5f8d094b969a130d8c2c7b4da07426313a9fea76
2023-09-08IVGCVSW-7901 Fix unsafe Usages of Memcpy in ArmnnDavid Monahan
* Updated usages of Memcpy to use proper checks for null instead of asserts * Added error checking in places where none existed Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I9529acd966466ba281f88918be2ec372a756e183
2023-08-31IVGCVSW-7525 Add broadcast_to operatorIdriss Chaouch
Signed-off-by: Idriss Chaouch <idriss.chaouch@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I94ec5f9120b2d736fdf98d00ec5137a4efd739b8
2023-08-28IVGCVSW-7505 Create FusedLayer and NeonFusedWorkload for AddMulAdd Neon kernelTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic778d35b001474b44fb1e433a6fe276e4ec9f565
2023-08-21IVGCVSW-7964 Fix UnidirectionalSequenceLstmNarumol Prangnawarat
* Fix incorrect batch size and time size * Fix incorrect time major when max time =1 * Fix incorrect permutation * Fix incorrect scratch buffer * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I510fae55528be412a58d020e82bd283852e7800b
2023-08-11Revert "MLCE-1093 Reshape and concat invalid results"Nikhil Raj Arm
This reverts commit 4980e21193f0a14fef084a7f4b4197392f3c0845. Reason for revert: Android Build for v82a failed due to schema not re-generating Change-Id: Ic19cf471b487f321c97ff837d36526512fb12fa4
2023-08-10MLCE-1093 Reshape and concat invalid resultsMike Kelly
!android-nn-driver:10089 * Disabled SubTensors on CL and Neon Backends. * Added Axis to ViewsDescriptor to store the value where ever possible. * Updated Splitter tests to provide all the information needed in the Descriptor. * Updated Serializer and Deserializer to handle axis. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I6a22d4750e04003689495b5e9e3c33deb37162bd
2023-08-04IVGCVSW-2291 TILE Operator CL ImplementationCian McGriskin
* Added Tile Operator Implementation to CL * Added calls to the existing UnitTests * Added Documentation Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: If7d25c7aa669c24e7816e5d445c7a3b9ce6972d4
2023-08-02IVGCVSW-7933 Deprecated code: remove forwarding headers for moved headersTracy Narine
* Removing deprecated headers that were added in 22.02 * Fixed a few locations where the forward header was still used Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ied42d0ecc750adadfbc053e0a3133d346f1ab343
2023-07-25IVGCVSW-7883 Front end and reference implementation for TILETeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: I0afb2403fee11c5c1e58ea65e2525e99594d8f2d
2023-07-17IVGCVSW-7879 Change REVERSE_V2 from LayerWithParameters with 1 input, to ↵Tracy Narine
Layer with 2 inputs * Changing ReverseV2 to use two inputs * This is required by the backends * The ReverseV2Descriptor was removed * Tests updated * Added a Run<> templatefor inputs with different data types Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: I22f947de829b4b3da6bda3a74f4ffdef4052cc25
2023-07-04IVGCVSW-7831: Front end and Reference Implementation for REVERSE_V2Tianle Cheng
* Descriptors added for ReverseV2 * Layer definition added * Input validation added * Reference workload implementation for ReverseV2 added * Reference layer unit tests made for ReverseV2 * CompareTensors method updated to support comparison between empty tensors * CMake and other build files updated Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I805738454421309fda77c44218a8df171d68dc18
2023-06-22IVGCVSW-7785 Extend support for 3D tensors BATCH_TO_SPACE and SPACE_TO_BATCH ↵Teresa Charlin
in CpuRef * Both layers were assuming 4D tensors, now 3D is supported too. * Remove some unnecessary includes * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7bdd11e4936a27cd97ec65fd915e6ccaa1494cff
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-05-08IVGCVSW-7454 Enable NonConstWeights in GpuAccTeresa Charlin
* Set flag for constant weights and bias in ACL tensorInfo in ACl workloads * Set flag for constant weights and bias in Unit Tests * Add to dot file for FullyConnected layer the constantWeights flag Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I87e1fef516ce4a8a59245dfdf7d92c153418e1d6
2023-05-08IVGCVSW-7307 Add CpuAcc Batch MatMul WorkloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I992ae9aae1174214607bf29305f21cdeaf3fdc1b
2023-04-18GitHub #719 Set quantization parameter scale to 1.0, instead of 0.0.Teresa Charlin
* Arm NN does not account for int8 or uint8 not quantized types, Tensorflow does. Not quantized int8 and uint8 is the same as quantized int8 and uint8 with scale = 1.0 and offset= 0 Default offset/zero_point was already 0, this review sets the default scale to 1.0. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc3eecc281de516c2cc706e17bde01c64ff9556e
2023-02-10IVGCVSW-7510 Delete temporary files created by DebugTestImpl.Colm Donelan
* The test cases that use DebugTestImpl were creating temporary files but not cleaning them up after running. * Refactored FileSystem to extract a common RemoveDirectoryAndContents function. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I35b8d2eeed286742358a9abccbc078493d033902
2023-01-25Fix incorrect copyright noticesMatthew Sloyan
* Updated headers that were missing a copyright notice. * Reverted years that were incorrectly updated. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I65842f1e9b9fd5654563edd5090133cb3c89fecc
2023-01-18IVGCVSW-7405 Improving error handling around creating directories.Colm Donelan
The -F execute network option creates a directory to print intermediate tensors but minor problems caused serious failures. This attempts to clean up the error handling. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ia44c008919b1bee299b43a672235b1fcc25bf1bd
2022-12-12IVGCVSW-7209 Remove deprecated code due to be removed in 23.02Mike Kelly
* Removed weights and bias from Convolution, DepthwiseConv & FullyConnected layers * Removed the weight and bias ConstTensorHandles from the QueueDescriptors * Updated Workloads to take tensors from WorkloadInfo rather than the QueueDescriptors * Removed unused RedirectMembersToConstantInputs optimization and tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I9ffcdc4a1c0dff725539dd69fc435b700bd98a56
2022-12-05IVGCVSW-4926 Add support in CpuRef implementation for Gather for axis ↵Nikhil Raj
different to 0 !android-nn-driver:8727 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4336007ad5a8552f7893ce6253f93cf9d1f5474f
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-10-28IVGCVSW-6494 Add CpuAcc Batch MatMul Workload Fp32Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2def6995f81d33e68f1ea45d8d19a1e6294049b1
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Bug fix where files were being overwritten at each debug layer Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I609fdc82afcee925824efb02183c7dbc942fced0
2022-10-19MLCE-545 INT8 TFLite model execution abnormalKeith Davis
* Add functionality to print output tensors to file in tempdir * UnitTests Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Idfb4c186544187db1fecdfca11c662540f645439
2022-09-07IVGCVSW-7209 Remove deprecated code due to be removed in 22.11Teresa Charlin
* Files deleted when Stabilizing the API Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0ae73ee36968fa880761c10358bfa827be5fe054
2022-08-30IVGCVSW-7105: BatchMatMul Optional Parameter SupportSamuel Yap
* Added transpose parameters to pre-transpose each input tensor's slices * Added adjoint parameters to pre-adjoint each input tensor's slices * Small refactoring (BatchMatMulDescriptor static helpers and BatchMatMulImpl constructor) * Updated input validation and output shape inference for parameters * Additional layer unit tests for parameters added * Versionings incremented Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ibe5242a8a5bf604c13de0dc65844fd6c421cc667
2022-07-27IVGCVSW-7109: Add Batch MatMul front end support - ReferenceSamuel Yap
* Descriptors added for BatchMatMul * Layer definition added * Input validation added (will likely change when opt. param support comes in) * Ref workload implementation for BatchMatMul added (will also change with opt. param support) * Ref layer tests made for BatchMatMul * CMake and other build files updated Signed-off-by: Samuel Yap <samuel.yap@arm.com> Change-Id: Ic885301da543ee0fbe7922b85e7f9658c4efc617
2022-05-16IVGCVSW-6124 ConstTensorsAsInput: Conv2d - FrontEndKeith Davis
* Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Ref. * Fixed resulting Neon / CL tests * Unified optimizers for conv2d ops * Optimizer Fix - Fp32ToBf16 * Partial implementation for ACL backends to fix VTS failures !android-nn-driver:7477 Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I5fb18877f7ee32643e15a9818945356274bb401b
2022-05-12IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete ACLCathal Corbett
* Added backend specific optimization & test for CpuAcc and GpuAcc: PermuteDepthwiseConv2dWeights Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I600476b2e9c557a39818a574c1091c9d650b21b1
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-05IVGCVSW-6127 ConstTensorsAsInput: DepthwiseConvolution2dCathal Corbett
!android-nn-driver:7418 * Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Change NNDriver to new API. * Updated Ref. * Neon and Cl backend partially completed (Backend.cpp files). * Added dynamic or constant input EndToEnd tests. * Added ConstantTensorAsInputMemeberVariableRedirect Optimization. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ib18b6c10a093042e165e25237dc04a4c67ba82da
2022-05-05Revert "IVGCVSW-6937 Add INT32 support to FLOOR"Teresa Charlin
This reverts commit 38b72e8de898d84a1481e242803da61009719891. * It is not longer needed as this functionality is cover with the commit: IVGCVSW-6938 Do not add Floor when FloorDiv is int32 in Tfliteparser Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iac757cf9b47d2516804dca2efb347cfbd3282f14
2022-05-05IVGCVSW-6806 Add Unidirectional Sequence Lstm support to NeonMike Kelly
* Corrected TensorInfo order for IsUnidirectionalSequenceLstmSupported * outputStateOut TensorInfo is not optional. * cellStateOut TensorInfo is not optional. * TensorInfo Order matches other QLSTM/LSTM layers. * Added missing parameters to UnidirectionalSequenceLstmOperator for delegate. * Added quantized UnidirectionalSequenceLstm support to Neon !android-nn-driver:7457 Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I26dde1bb96793dd25eb9081ca5ae5f63752288c4
2022-05-04IVGCVSW-6937 Add INT32 support to FLOORTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6f7cddb2d23c67ae682132d18f98776c074dcb3b
2022-05-03IVGCVSW-6856 Add GATHERNd FrontEnd and Ref ImplementationTeresa Charlin
* Add front end * Add reference workload * Add unit tests * Add EndToEnd test Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4cebd17b18476df86162e2dda3366c10e80bd2f8
2022-04-13IVGCVSW-6174 Add Cl Pooling3d WorkloadRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new ClPooling3dWorkload header and source files * Add Pooling3d workload to ClWorkloads.hpp * Add tests for Pooling3d workload * Add Pooling3d build function to ArmComputeTensorUtils Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500 Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
2022-03-03Revert "Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Neon"" This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed. Reason for revert: 22.02 release. Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
2022-02-23IVGCVSW-6803 Add int32 support for CONCATENATION in CpuRefTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id9decafcebb6dbcac3a03516281524f22419cbfb
2022-02-23Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Neon" This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16. Reason for revert: cannot update ACL pin until 22.02 release. Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
2022-02-21IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 to NeonCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
2022-02-09IVGCVSW-6399 Remove deprecated code 22.02Francis Murtagh
* Remove LayerSupport.hpp which was replaced with ILayerSupport interface and the BackendHelper.hpp GetILayerSupportByBackendId() function * Fix bug in backend helper where value of Optional was passed even if Optional had no value. Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I03f1f693abe927a14c1942ef7e21edccc8357b35
2022-02-07IVGCVSW-6635 Move MemCopyTestImpl from acl to armnnTestUtils.Colm Donelan
* Move MemCopyTestImpl.hpp from src/backends/aclCommon/test/ to include/armnnTestutils. * Refactor MemCopyTests in aclCommon, cl and Neon. * Introduce RefMemCopyTests to exercise this utility in x86 builds. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8824f013d3656658ed0a2904bb79384e3af68641
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-10 15:16:58 +0000