aboutsummaryrefslogtreecommitdiff
path: root/src/backends/backendsCommon/WorkloadData.cpp
AgeCommit message (Collapse)Author
2020-10-02IVGCVSW-5294 Remove boost::format armnn backendsJames Ward
* replaced with fmt::format * one case required std:stringstream instead Signed-off-by: James Ward <james.ward@arm.com> Change-Id: Ife7c4cf5f143e43373f42edf6124158af132abc5
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-09-17IVGCVSW-5300 Remove some boost::numeric_cast from armnn/backendsMatthew Sloyan
* Replaced with armnn/utility/NumericCast.hpp * Some exclusions in reference backend * Excluded as requires float implementation in NumericCast.hpp Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I9e4e9cd502c865452128fa04415fd6f250baa855
2020-07-06IVGCVSW-4624 Add a RANK Reference ImplementationFinn Williams
* Add Rank front end * Add Rank reference implementation * Add Rank serialization support * Add Scalar serialization support Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I06e4a468c2a84e79bae2e6c5348596bbbf853b4b
2020-06-11IVGCVSW-4906 Add front-end support for FILL operatorRyan OShea
* Added new fill layer * Added visitor tests Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: Iea677014866b4f2d514004623f59ee83f3c0eef8 Signed-off-by: Keith Davis <keith.davis@arm.com>
2020-06-03remove BOM from filesLaurent Carlier
Change-Id: Ia4b4bb3be0ed6e933c77d58f8e9879b1370e9537 Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
2020-05-29IVGCVSW-3847 Support INT32 in Gather operatorTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ica217d3e4fbcdef1315554ea5d5c4720124696c3
2020-05-25IVGCVSW-4863 ADD,SUB,DIV,MUL,MAXIMUM and MINIMUM int32 VTS testTeresa Charlin
skipped in CpuRef Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I1c870ac258e8c3805a95b259cb40731f8e81541e
2020-05-22IVGCVSW-4453 QLSTM SupportSadik Armagan
* Number of elements is output size for projection bias on QLSTM Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I9d32cfb187bbe0c6ef809a7a89da907fbac83380
2020-05-02IVGCVSW-4449 Add QLstm ref implementationJames Conroy
* Adds ref implemenation for new HAL 1.3 operator, QLstm. * Adds Layer and CreateWorkload unit tests. * Adds WorkloadData validate for QLstm. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I8a721f07ff06105e6495a1a0561b9503aa8146dc
2020-04-27IVGCVSW-4668 Add TENSOR_QUANT8_ASYMM_SIGNED data type support to CpuRef ↵Sadik Armagan
operators Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I094125ba80699cc3cf5226bda6662a54e6caa988
2020-04-24IVGCVSW-4686 Fix NNT GeneratedTests Abs_int32Kevin May
* Add Signed32 to WorkloadData for AbsQueueDescriptor * Add missing supported tests to Ref and Neon Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Iba9d29fedeb1d2e985272c9299ea42ba2571687b
2020-04-06IVGCVSW-4485 Remove Boost assertNarumol Prangnawarat
* Change boost assert to armnn assert * Change include file to armnn assert * Fix ARMNN_ASSERT_MSG issue with multiple conditions * Change BOOST_ASSERT to BOOST_TEST where appropriate * Remove unused include statements Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I5d0fa3a37b7c1c921216de68f0073aa34702c9ff
2020-03-26IVGCVSW-4597 Modify BF16 optimizer to Convert only inputs and weights ofNarumol Prangnawarat
Convolution2d and FullyConnected layers * Add InsertConvertFp32ToBf16LayersBefore * Add ConvertWeight to ConvertFp32NetworkToBf16Impl for Conv2d and FullyConnected * Allow different input and output when input is BF16 and output is FP32 Conv2d and FullyConnected layers * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ic8f92ff28edcae08a72a3114a28f50c4619f919b
2020-03-24IVGCVSW-3813 Add Unary Elementwise Operation 'NEG' support to the ↵Sadik Armagan
android-nn-driver * Implemented ClNegWorkload * Implemented NeonNegWorkload * Enabled 'NEG' operator on CL and Neon as well as Ref * Implemented unit tests for 'NEG' operator Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I3d7a892692716636cae6bdf8ddd238e3d1ea064f
2020-03-19IVGCVSW-4516 Add ConvertFp32ToBf16Layer and Ref workload supportNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9099a4f840fb747336f77d20a0868b64e801a310
2020-03-17IVGCVSW-4515 Add ConvertBf16ToFp32Layer and Ref workload supportNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ida6d7e1d2c9abe0618f8b711bab9d62c011090d6
2020-03-13IVGCVSW-4511 Add BFloat16 to RefLayerSupport and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ifaae4d5aac468ba927b2c6a4bf31b8c8522aeb2e
2020-03-10MLCE-159 Add QAsymmS8 to ArmnnQuantizerFrancis Murtagh
* Allow per layer quantization from Fp32 to Int8 (QAsymmS8) like TfLite Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I5bbf770aa29d81af3568c15b47d2b2c18e55bb28
2020-03-09MLCE-160 Error loading quantized model containing BatchNorm LayerMike Kelly
* Relaxed restrictions in BatchNormalizationQueueDescriptor::Validate Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I3101971c2101e90144bbbf7b63367cb0ef09573f
2020-03-02IVGCVSW-4375 Add support for TransposeMike Kelly
* Added TransposeLayer * Added CL, Neon and Ref Workloads * Added Transpose utilities * Added Serializer and Deserializer support * Added Quantizer support Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I04c755ba7cb5b1edf72b3c9f3c0314878032e3c7
2020-02-19IVGCVSW-4472 Yolo v3 ExecuteNetwork failingKeith Davis
* Add Debug workload for QAsymmS8/U8 * Change Dequantize tests to test AsymmS8 instead of SymmS8 * Fix incorrect supportedness within RefLayerSupport Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Ie51f1e33c564d46c86bf0150b1addda3fc093d13
2020-02-17IVGCVSW-4436 Add ExecuteNetwork test for mobilenet_v2_int8Keith Davis
* Add QAsymmS8 to QueueDescriptor supportedTypes * Add QSymmS8/QAsymmS8 to RefLayerSupport supportedTypes * Some additional comments and refactoring Change-Id: I8567314452e6e8f6f69cb6e458ee147d3fc92fab Signed-off-by: Keith Davis <keith.davis@arm.com>
2020-02-07IVGCVSW-4386 Add ArmNN reference support for QAsymmS8Ryan OShea
* Added Quantization Scheme for QAsymmS8 * Added Unit Tests for QAsymmS8 * Renamed QAsymm8 calls to QAsymmU8 Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Change-Id: I897b4e018ba1d808cc3f8c113f2be2dbad49c8db
2020-01-31IVGCVSW-4390 Refactor QUANTIZE to make use of Decoder/Encoder typesKeith Davis
* Add no-ops for CL/NEON Uint8 * Refactor Quantize workload to Decoder/Encoder types Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I80b09de528299b925e2ac38acd9a5019b8d3e4ac
2020-01-28IVGCVSW-4306 Verify the tflite Yolo v3Keith Davis
* Added debug layer support for QSymmS8 * QSymmS8 support for workloads Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I51af92fadc0be290629dd9198beab5abef9e351f
2020-01-24IVGCVSW-4370 Deprecate DataType::QuantizedSymm8PerAxisDerek Lamberti
!android-nn-driver:2622 Change-Id: If99d3eff71ff66ba28af1e5af248299fe04511b9 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-23IVGCVSW-4259 Add frontend and reference workload for UnaryOperationLayerjosh minor
* Added new layer named ElementwiseUnary * Deprecated existing Abs/Rsqrt layer functions * Updated existing Abs/Rsqrt test infrastructure to use new layer * Added boilerplate for new Exp,Neg,Sqrt elemwise op layers * AbsQuantize test removed pending future commit * Serialization support added !android-nn-driver:2550 Change-Id: Ic595c645925e17b45db568187fd05646daf2e87f Signed-off-by: josh minor <josh.minor@arm.com>
2020-01-13Rename quantized data types to remove ambiguity for signed/unsigned payloadsDerek Lamberti
!android-nn-driver:2572 Change-Id: I8fe52ceb09987b3d05c539409510f535165455cc Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-02IVGCVSW-4246 Clean build of backends with -WextraDerek Lamberti
Change-Id: I9e8d5576b3ec04c871785d5f2f9545bf1136e59b Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2019-12-09IVGCVSW-4211 Add Signed 8 bit Quantisation support into the Reference backendFinn Williams
!android-nn-driver:2435 Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I10ecd4a8937725953396805f33a3562a5384c4d4
2019-12-09IVGCVSW-4210 Create a public API for the common backend filesMatteo Martincigh
* Create a public API for the common backend files * Move OutputHandler to armnn internal * Remove unused headers Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I3e86d908b021e3561befa9d45158d87d2cbb18c0
2019-11-29IVGCVSW-4209 Create a public API for the ArmNN UtilsMatteo Martincigh
* Moved the relevant armnnUtils headers to the new location: include/armnnUtils * Update the header usage throughout the source code !android-nn-driver:2387 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com> Change-Id: I2ba15cebcacafad2b5a1a7b9c3312ffc585e09d6
2019-11-27Add IsQuantizeType(DataType) for use in validation functionsAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ib790b24cfde87c92e29615da942c25bf7c98f95e
2019-11-20IVGCVSW-4151 HAL 1_2 Dequantize FP32 Per Channel Tests on CpuAcc FailingSadik Armagan
* Added support for data types QuantisedSymm8 and QuantizedSymm8PerAxis as they are supported on CpuAcc Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I55f81b35c8869bc37b7634bdbe91b8e3339eb648
2019-11-15IVGCVSW-3486 Add clipping parameter validation in LstmQueueDescriptorjaneil01
* Add clipping parameter validation in LstmQueueDescriptor * Related UnitTest Signed-off-by: janeil01 <jan.eilers@arm.com> Change-Id: I86ff81cacc0e1fff5b78a8d6c2dcbf9ff57e2272
2019-11-13IVGCVSW-4128 Add Signed32 to supported input types for Ref ArgMinMaxFrancis Murtagh
* Enabled RefLayerTests for Signed32 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Idbe6fb7607c7e44a8df560b55f28c64a4c4286cd
2019-11-12IVGCVSW-4079 Add support of per-axis quantization to DepthwiseConvolution2dTeresa Charlin
!android-nn-driver:2260 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iad93c1940568ffa65ed314c8871ea66caf4f9e4a
2019-11-12IVGCVSW-3839 Add support of per-axis quantization to reference ↵Aron Virginas-Tar
TransposeConvolution2d Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ie0dc1204eee925adfb1e59aba3f1137178302184
2019-11-06IVGCVSW-3837 Add support for per-axis quantization to reference ↵Aron Virginas-Tar
Convolution2d workload Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I0ac08ba4864d48e6f64c4ac645dad8ea850be112
2019-11-01Increase tolerance for bias scale quantization calculation for ResNet50v2ricbur01
Signed-off-by: Richard Burton <richard.burton@arm.com> Change-Id: I033ef445fa8e5ae825cfde29927b88e97e20f093
2019-10-31IVGCVSW-3842 Add per-axis quantization support to ↵Aron Virginas-Tar
ValidateBiasTensorQuantization() * Altered the function to validate all the scale values in the bias tensor info when per-axis quantization is enabled * Added unit test to check if ValidateBiasTensorQuantization() works as intended Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I676d17690cda6bbdd41da5fdbaa50a3d3b5fd102
2019-10-21IVGCVSW-3993 Add frontend and reference workload for ComparisonLayerAron Virginas-Tar
* Added frontend for ComparisonLayer * Added RefComparisonWorkload * Deprecated and removed Equal and Greater layers and workloads * Updated tests to ensure backward compatibility Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id50c880be1b567c531efff919c0c366d0a71cbe9
2019-10-11IVGCVSW-3973 Add frontend for LOG_SOFTMAXAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ic6acc7176deea3753b32ce6340f642d19dce0e9f
2019-10-10IVGCVSW-3944 Add ArgMinMax output shape validationJames Conroy
Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I469895da158b062cd19248832525fa21527f7d41
2019-10-09IVGCVSW-3889 Add CL workload for INSTANCE_NORMALIZATIONAron Virginas-Tar
!android-nn-driver:2039 Signed-off-by: Kevin May <kevin.may@arm.com> Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I621dd80920b58b8b795ed13917b88850519c8177
2019-10-03IVGCVSW-3932 Add frontend for INSTANCE_NORMALIZATIONKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Ib152148ccd8d2733c617d0cf9402661fc6b71316
2019-10-03IVGCVSW-3696 Add NEON ArgMinMax workload and testsJames Conroy
* Added layer tests and fixed WorkloadData validate. * Also enabled copy to/from NEON for Signed32. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I5e961f88434e18d5a8ebff956d20a1c2cf1b50bb
2019-09-20Fix some minor issues around SpaceToDepthAron Virginas-Tar
* Removed unnecessary code from SpaceToDepthLayer::InferOutputShapes() * Refactored SpaceToDepthQueueDescriptor::Validate() and added extra checks for block size and output depth Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ieeed3144e2589b2e8695ef65ce17752bc595332f
2019-09-20IVGCVSW-3883 Add frontend for DepthToSpace layerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I18d957af6e988ffb6b9ee46ac836d1f38600e10b