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path: root/src/backends/backendsCommon/WorkloadData.cpp
AgeCommit message (Expand)Author
2022-05-19IVGCVSW-6455 Support Const + Dequantize layer and optimize it.Teresa Charlin
2022-05-19IVGCVSW-6929 Support for models with implicit expandedMike Kelly
2022-05-19IVGCVSW-6124 ConstTensorsAsInput: Conv2d - FrontEndKeith Davis
2022-05-12IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete ACLCathal Corbett
2022-05-05IVGCVSW-6127 ConstTensorsAsInput: DepthwiseConvolution2dCathal Corbett
2022-05-05Revert "IVGCVSW-6937 Add INT32 support to FLOOR"Teresa Charlin
2022-05-05IVGCVSW-6806 Add Unidirectional Sequence Lstm support to NeonMike Kelly
2022-05-04IVGCVSW-6937 Add INT32 support to FLOORTeresa Charlin
2022-05-03IVGCVSW-6856 Add GATHERNd FrontEnd and Ref ImplementationTeresa Charlin
2022-02-16Refactor Forced ImportFinn Williams
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
2021-11-17IVGCVSW-6509 Front End + Reference Workload implementationTamás Nyíri
2021-10-20Add ConstTensorsAsInput support for Conv3dMatthew Sloyan
2021-10-02IVGCVSW-5985 Remove deprecated codeJan Eilers
2021-10-01IVGCVSW-6163 Add Conv3d FrontEnd and Ref ImplementationMatthew Sloyan
2021-09-24IVGCVSW-3705 Add Channel Shuffle Front end and Ref ImplementationSimon Obute
2021-08-10MLCE-530 Add support for UnidirectionalSequenceLstm to RefWorkloadexperimental/daves_custom_allocator_dmabufNarumol Prangnawarat
2021-08-06IVGCVSW-6119 ConstTensorsAsInput: FullyConnectedMatthew Sloyan
2021-07-22MLCE-530 Add front end support for UnidirectionalSequenceLstm on ArmNNNarumol Prangnawarat
2021-06-16MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
2021-06-16IVGCVSW-5826 Change weights layout for depthwise to [1,H,W,I*M]Jan Eilers
2021-05-06IVGCVSW-5815 Generalise ConstCpuTensorHandleJames Conroy
2021-05-05IVGCVSW-5882 Produce warning if bias quantization scale mismatchmathad01
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
2021-03-25IVGCVSW-5736 and IVGCVSW-5743 'NonConstWeights: Update front-end and TfLiteDe...Sadik Armagan
2021-02-11MLCE-347 Bug fixes in Reduce: QueueDescriptor.validate and init REDUCE_MINTeresa Charlin
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
2020-11-27IVGCVSW-5499 Missing validation for zero strideTeresa Charlin
2020-11-18Fix logical vts skipNarumol Prangnawarat
2020-11-13IVGCVSW-5495 Fix validation for per-channel quantJames Conroy
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
2020-10-08IVGCVSW-5363 Add Unmap layer and Unmap workloadJim Flynn
2020-10-07IVGCVSW-5362 Add Map layer and Map workloadJim Flynn
2020-10-02IVGCVSW-5294 Remove boost::format armnn backendsJames Ward
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
2020-09-17IVGCVSW-5300 Remove some boost::numeric_cast from armnn/backendsMatthew Sloyan
2020-07-06IVGCVSW-4624 Add a RANK Reference ImplementationFinn Williams
2020-06-11IVGCVSW-4906 Add front-end support for FILL operatorRyan OShea
2020-06-03remove BOM from filesLaurent Carlier
2020-05-29IVGCVSW-3847 Support INT32 in Gather operatorTeresa Charlin
2020-05-25IVGCVSW-4863 ADD,SUB,DIV,MUL,MAXIMUM and MINIMUM int32 VTS testTeresa Charlin
2020-05-22IVGCVSW-4453 QLSTM SupportSadik Armagan
2020-05-02IVGCVSW-4449 Add QLstm ref implementationJames Conroy
2020-04-27IVGCVSW-4668 Add TENSOR_QUANT8_ASYMM_SIGNED data type support to CpuRef opera...Sadik Armagan
2020-04-24IVGCVSW-4686 Fix NNT GeneratedTests Abs_int32Kevin May
2020-04-06IVGCVSW-4485 Remove Boost assertNarumol Prangnawarat
2020-03-26IVGCVSW-4597 Modify BF16 optimizer to Convert only inputs and weights ofNarumol Prangnawarat
2020-03-24IVGCVSW-3813 Add Unary Elementwise Operation 'NEG' support to the android-nn-...Sadik Armagan
2020-03-19IVGCVSW-4516 Add ConvertFp32ToBf16Layer and Ref workload supportNarumol Prangnawarat
2020-03-17IVGCVSW-4515 Add ConvertBf16ToFp32Layer and Ref workload supportNarumol Prangnawarat
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