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path: root/src/armnnTfParser/test/Convolution2d.cpp
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2021-02-05MLCE-326 'Support Dilation in Conv2D in ONNX and Tensorflow Parsers'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I4a0f07b1e8f80aff0d29405def1f33bde7944e31
2020-04-06IVGCVSW-4485 Remove Boost assertNarumol Prangnawarat
* Change boost assert to armnn assert * Change include file to armnn assert * Fix ARMNN_ASSERT_MSG issue with multiple conditions * Change BOOST_ASSERT to BOOST_TEST where appropriate * Remove unused include statements Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I5d0fa3a37b7c1c921216de68f0073aa34702c9ff
2018-12-05IVGCVSW-2264 Remove input swizzling from ParseConv2D in the TF parserMatteo Martincigh
* Removed the input swizzling when the data layout is NHWC * Permuting weights depending on the data layout used * Added getter methods to ParsedConstTfOperation to get the tensor info and the storage memory area, needed for swizzling the weights * Added unit tests for both NHWC and NCHW data layouts Change-Id: I6543900c594417df630b2663d8551158b93b7836
2018-09-17IVGCVSW-1807 : change license text in file headersDavid Beck
All changes are the same: // // Copyright © 2017 ARM Ltd. All rights reserved. -// See LICENSE file in the project root for full license information. +// SPDX-License-Identifier: MIT // Change-Id: I37eae011411133663ca9d2b059714d92f8bf8e24
2018-08-31Release 18.08telsoa01
2018-03-29Release 18.03surmeh01