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2021-04-29IVGCVSW-5819 5820 5821 Add MemorySourceFlags to ↵Francis Murtagh
TensorHandleFactoryRegistry::GetFactory * Modify Layer::CreateTensorHandles to include MemorySource * Modify INetworkProperties to add MemorySource * Disable Neon/Cl fallback tests until full import implementation complete Change-Id: Ia4fff6ea3d4bf6afca33aae358125ccaec7f9a38 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2021-04-29IVGCVSW-5890 Prevent modification to const layers with multiple connectionsColm Donelan
* In AddBroadcastReshapeLayerImpl check if a constant layer has other connections before modifying its output tensor shape. * In ElementWiseBaseLayer replace an ARMNN_ASSERT with a proper error message. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Id3f3796c260eede61f076660505257a8b65d93fc
2021-04-29IVGCVSW-5744 Remove Tensorflow, Caffe and Quantizer from documentationKevin May
* Remove from .md files and Doxygen * Remove from armnn/docker build * Remove Tensorflow model format from ExecuteNetworkParams * Remove Tensorflow model format from ImageTensorGenerator Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: Id6ed4a7d90366c396e8e0395d0ce43a3bcddcee6
2021-04-29IVGCVSW-5775 'Add Async Support to ExecuteNetwork'Sadik Armagan
* Enabled async mode with '-n, concurrent' and 'simultaneous-iterations' in ExecuteNetwork * Number of input files provided should be equal to number of input files provided multiply by number of simultaneous iterations divided by comma !armnn:5443 Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibeb318010430bf4ae61a02b18b1bf88f3657774c
2021-04-28IVGCVSW-4618 'Transition Units Test Suites'Sadik Armagan
* Moved doctest third-party library to armnn from delegate. License file is added. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I4257c492ffd1c2d1b695ae4fc3ae70432acbaded
2021-04-28IVGCVSW-5843 Separate memory managers for WorkingMemHandlesFinn Williams
* Add inter layer memory management to WorkingMemHandle * Change Const layers to be executed once in loadedNetworkConstruction and share tensorHandle between all WorkingMemHandles * Fix various reference workloads pointing to memory in the queueDescriptor Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I69d4b3c5c84d2f5abe4540c3e624ab4f00d88226
2021-04-28IVGCVSW-5831 Add additional options to Arm NN External DelegateMatthew Sloyan
* Added enable-fast-math and number-of-threads options. * Added save-cached-network and cached-network-filepath options. * Added external_delegate python tests for new options. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I7cf6522a6f895cd71ed8f369d94a5113d78594f9
2021-04-28IVGCVSW-5416 'Add android-nn-driver support for CASTSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I02da912e5e4ca650b367ca40fe3f5ca5baa61cbb
2021-04-27IVGCVSW-5721 Remove the Tensorflow Parser from ArmNNNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ida37d3ee3a1af0c75aa905199bd861726c646846
2021-04-27IVGCVSW-5719 Remove QuantizerKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I8a29df03afdd6f1cc8413b219e179272cd2d51cf
2021-04-27IVGCVSW-5714 Add example wav file for Wav2Letter GuideKevin May
* The wav file is a recording of the phrase "the quick brown fox jumps over the lazy dog" * This has been approved with legal Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I8c3ba7d108623de94fb961e00f1dc34b78cd6452
2021-04-26IVGCVSW-5762 Update delegate build guide to remove tensorflow build.Colm Donelan
* Removed the build of tensorflow. * Fixed some build parameters. * Added minor fixes to improve usability. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I9d03438ff8c3015c442d9662ae3d2b8e7cd58382
2021-04-23IVGCVSW-5430 'Add CAST Operator Support to Delegate'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I6da711950b8e7d3c0d5cbd443e91eb36700ac4c8
2021-04-22IVGCVSW-5419 'Add ACL Support for CAST Operator'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I481343af311cf3cbc81eee80e80d8b5581fdfd7b
2021-04-22IVGCVSW-5420 'Add CL support for CAST'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I1bbf1f2edf7282cb69b99e22de1b8a2fe6e443c2
2021-04-22IVGCVSW-5418 ExecuteNetwork test for MobileBERTmathad01
* Removed check in TfLiteParser and Delegate that requires both weights and biases to be constant or non-constant simultaneously * Updated TfLiteParser FullyConnected layer test to properly use non-constant weights * MobileBERT Float32 model now runs on TfLiteParser Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: I1d75eea466caa90cd695ad353160362df2f69483
2021-04-21IVGCVSW-5909 Fix CTS failure in GpuAcc DIV int32Teresa Charlin
* CLWorkload was only supporting float Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic57a490f03a055c158edc19e831b153a44e25166
2021-04-21Fold PAD into Pooling2d if possibleDiego Lopez Recas
Some models would add a PAD layer before a pooling when they can't express their padding configuration as SAME or VALID. ArmNN can potentially merge the two merge the two because pooling layers are described with explicit padding. The merge is possible if the extra padding is neutral in the combined pooling operation. A merged operation can only fuse paddings in the dimensions that accept explicit padding in a pooling operation, i.e. the spatial dimensions. Signed-off-by: Diego Lopez Recas <diego.lopez.recas@gmail.com> Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Icd54718dcd9e797c923456b7fa6e0213e288e668
2021-04-21IVGCVSW-5842 Remove cross-wiring in depthwiseJan Eilers
* Reading tensor infos won't allow a permutation vector anymore. The permutation only changed the quantization dimension not the shape and was therefore misleading * The permutation of the full tensor info is now performed in armnnUtils::Permuted * Changed TfLite Parser depthwise parsing function * Added unit tests to TfLite Parser with more random data * Changed TfLite Delegate depthwise parsing function * Added unit test to the delegate with per channel quantization !android-nn-driver:5412 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I1f985ee69547bcaf16a72201e00a6b6fe1ef9a97
2021-04-20IVGCVSW-5816 Constant memory accessFrancis Murtagh
* Add new class ManagedConstTensorHandle to Unmap when out of scope * Integrate into existing layers that have constants * Add unit tests Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I0a05e14e438804b37e9862e76b5ca329483f6b45
2021-04-19Update ACL pin to 9a81cd82a8102ee0bd69bfe4939d5c867aed15e9Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I8d13a83cf89877f007d3f18a9a97c2622b58ba2a
2021-04-19IVGCVSW-5829 Segfault in TfLiteDelegateMatthew Sloyan
* Updated Split function to read correct axis data. * Improved validation in Split and SplitV function. * Moved ComputeWrappedIndex function to DelegateUtils.hpp. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I8c7d0c9b747d1ab548df98da930d838c2f57659e
2021-04-16IVGCVSW-5720 Remove the Caffe Parser from ArmNNNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ib00be204f549efa9aa5971ecf65c2dec4a10b10f
2021-04-15IVGCVSW-5829 Segfault in tflite-parser, int8 modelsMatthew Sloyan
* Updated ParseSplit TfLiteParser function to read correct axis data. * Improved validation in ParseSplit and ParseSplitV function. * Added TensorFlow BOOL support to TfLiteParser. * Added supported ElementWiseUnary operators to TfLiteParser E.g. ABS, LOGICAL_NOT and RSQRT. * Removed ParseExp and ParseNeg function implementation in favour of reusable ParseElementWiseUnary function. * Removed Exp.cpp and Neg.cpp files and moved tests to ElementWiseUnary.cpp. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibce36e3ce4d95755dda88abc2ddde1e07e62c5e2
2021-04-15Documenting that the python ASR example app only supports audio files with ↵Éanna Ó Catháin
16000Hz sampling rate. Change-Id: Ib36cf059fe1d187204f73352eb91bf7134757221 Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
2021-04-14IVGCVSW-5787 Add/Update Execute() implementations in RefActivationWorkloadFinn Williams
* Added multithreaded StridedSliceEndToEndTest Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I4579db7b5959e0a22256f1bda00238c22e611dec
2021-04-14Update ACL pin to 91b7f7423a97f0ae713a13182f289621dad17c43Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I6f4366b56fe1ca77146620be27ce26f42a373d80
2021-04-14IVGCVSW-5795 Use ${CMAKE_THREAD_LIBS_INIT} throughout instead of 'pthread'Francis Murtagh
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I32a92e0efabefd1e342203a13f11a622a3e25076
2021-04-13IVGCVSW-5795 Update Debian Packaging for 21.02Francis Murtagh
* Update Docs to reflect removal of dash from package names in order to follow debian standards (package name must match .so name) * libarmnn-tfliteparser - > libarmnntfliteparser * libarmnn-tfliteparser-dev -> libarmnntfliteparser-dev * libarmnn-aclcommon24 -> libarmnn-aclcommon24 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I283cac293f018e4eaa3170eedc2947e64ed1cd7c
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-04-12Update ACL pin to 99b1a1cc1bdeaec08d2a8fb5ac5d104502e05570Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ife010f2eebace4efbf90c2469cea88175b522a76
2021-04-12Documentation - Add "How to get involved" section to README.mdFrancis Murtagh
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I5919c9b93f335e09e542c7ecfbcba637f64df3b8
2021-04-09IVGCVSW-5804 TfLiteParser fails to correctly parse ArgMinMaxMatthew Sloyan
* Fix for GitHub#523. * Updated ParseArgMinMax function to read correct axis data. * Improved validation in ParseArgMinMax function. * Added ARG_MIN support to TfLiteParser. * Added ArgMinMax unit tests for TfLiteParser. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib4ce1a7c66e210c47859a130c4896aac958f2654
2021-04-09MLCE-328 Serializer/Deserializer does not support Signed64Mike Kelly
* Added support for Signed64 to flatbuffer's schema & updated source tree * Added support for Signed64 to TFLite Delegate * Added support for Signed64 to Serializer * Added support for Signed64 to Deserializer * Added unit test for ArgMinMax to Deserializer * Deprecated m_Output_Type from the ArgMinMaxDescriptor: the output type is solely determined by the DataType of the output Tensor * Fixed issue where RefArgMinMaxWorkload could output data using the wrong DataType * Added Signed64 to RefLayerSupport::IsArgMinMaxSupported as a supported type Signed-off-by: Mike Kelly <mike.kelly@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib622c052a1f8aa3e658262f8bde5a6881a8cbe10
2021-04-09IVGCVSW-5803 Delegate Unit Tests Failure on Android: Normalization & SoftmaxKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I2873f8563cc11da550d460b04e5175372489a564
2021-04-09Update ACL pin to 3b5981ce898569aafa98abdf220c73f1a80685b9Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ie82f312cd09ece61c3e5c11b653b9a7511f23620
2021-04-08IVGCVSW-5823 Refactor Async Network APIMike Kelly
* Moved IAsyncNetwork into IRuntime. * All LoadedNetworks can be executed Asynchronously. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ibbc901ab9110dc2f881425b75489bccf9ad54169
2021-04-08IVGCVSW-5793 Add default ExecuteAsync implementation to WorkloadFinn Williams
Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: If2069b4d274286e654ac2bceb52d147f9ee3a7a9
2021-04-07IVGCVSW-5768 Output layer bindings are ignoring outputSlotIndex.Colm Donelan
In the bug there were 4 outputs from the final layer. The de-serialized layer bindings were incorrectly assigning the tensor info of one output to all 4 outputs. The solution is to use outputSlotIndex. One other minor fix: The debug text referred to an Input when dealing with an output. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I6c68b781a450ae4a5cf1d0e8671bb96ff01862b2
2021-04-07Fix graph copy memory spikeFinn Williams
* Change layer storage of ConstTensors to std::shared_ptr<ConstCpuTensorHandle> * Change clone to share ConstTensor rather than copy * Remove uses of non-const GetTensor() call * Reduce scope of non-optimized network in ExeNet, so memory can be released after use Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Ibb2c7309d12411d21405bd6024c76bcdf5404545
2021-04-07Update ACL pin to c5b1beec99d2be7ff3babbc6345b1baa81f29eb7Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ic3efd8106be43ff2c1d250238d162e51e3a86a57
2021-04-07IVGCVSW-5422 Add per-channel quantization tests to depthwiseJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ie51ce20540e5e7a704ce2b4be4e8cf64f91ea990
2021-04-02IVGCVSW-5783 'Add AsyncExecution Capability'Sadik Armagan
* Added AsyncExecution to the BackendCapability enum class. * Logged a warning if backends do not support AsyncExecution capability if AsyncNetwork is created. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I49f8467297f4b6b8e414cb6a3638a7d3f1bb886a
2021-04-01IVGCVSW-5651 'Regression in CLConvolution2dWorkload'Sadik Armagan
* Enable GPU profiling on ExecuteNetwork Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I57bb4eeb45674e5218fce7e67b9bddf16ba0894d
2021-04-01Update ACL pin to 33f41fabd30fb444aaa0cf3e65b61794d498d151Nikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: If0921a9f4d5c9a61dac30a43650fbb5a875b8ce7
2021-03-30Update ACL pin to 2788609b8a10306e9eae47543b39812a7b075aaaNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I11c1a61a6ff7a7252f086b61a9fc14ec48dd9efc
2021-03-30IVGCVSW-5799 'Create Pimpl Idiom for Async prototype'Sadik Armagan
* Implemented Pimpl Idiom for IAsyncNetwork Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ic7311880563568b014a27f6347f8d41f2ad96df6
2021-03-30Update x86_64 DockerFile for armnnKeith Mok
Fix break for DockerFile Signed-off-by: Keith Mok <ek9852@gmail.com> Change-Id: I0c0b10fa212583b8861301fb9e1e926237b7867d
2021-03-29IVGCVSW-5676 Fixing build failure in backends jenkins job.Colm Donelan
* Adding ref backend "ifdef" around ref test cases in NeonLayerTests_NDK_Bug.cpp * Removing unnecessary includes from NeonLayerTests_NDK_Bug.cpp. * Removing unnecessary include from NeonLayerTests.cpp * Breaking up Backends_Capability_Test into one per backend to allow for conditional compilation. * Remove unnecessary printout in src/backends/neon/test/CMakeLists.txt Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: I9a36cd197e684ed55af244e5c998ee67bb8da88c
2021-03-29Update ACL pin to 1e3ab4264fb0455abe8a3903abab40c59b9be91eNikhil Raj
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I096f8f6f3c7352fdfa11eca5423c461082a1f163
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-18 13:17:07 +0000