6 files changed, 92 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/CMakeLists.txt b/src/backends/reference/workloads/CMakeLists.txt
index d71e6ea032..d15f77d6e4 100644
--- a/src/backends/reference/workloads/CMakeLists.txt
+++ b/src/backends/reference/workloads/CMakeLists.txt
@@ -94,6 +94,8 @@ list(APPEND armnnRefBackendWorkloads_sources
     RefResizeBilinearFloat32Workload.hpp
     RefResizeBilinearUint8Workload.cpp
     RefResizeBilinearUint8Workload.hpp
+    RefRsqrtFloat32Workload.cpp
+    RefRsqrtFloat32Workload.hpp
     RefSoftmaxFloat32Workload.cpp
     RefSoftmaxFloat32Workload.hpp
     RefSoftmaxUint8Workload.cpp
@@ -110,6 +112,8 @@ list(APPEND armnnRefBackendWorkloads_sources
     RefWorkloadUtils.hpp
     ResizeBilinear.cpp
     ResizeBilinear.hpp
+    Rsqrt.cpp
+    Rsqrt.hpp
     Softmax.cpp
     Softmax.hpp
     SpaceToBatchNd.hpp
diff --git a/src/backends/reference/workloads/RefRsqrtFloat32Workload.cpp b/src/backends/reference/workloads/RefRsqrtFloat32Workload.cpp
new file mode 100644
index 0000000000..c08dbf0cab
--- /dev/null
+++ b/src/backends/reference/workloads/RefRsqrtFloat32Workload.cpp
@@ -0,0 +1,25 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "RefRsqrtFloat32Workload.hpp"
+
+#include "RefWorkloadUtils.hpp"
+#include "Rsqrt.hpp"
+
+#include <Profiling.hpp>
+
+namespace armnn
+{
+
+void RefRsqrtFloat32Workload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefRsqrtFloat32Workload_Execute");
+
+    Rsqrt(GetInputTensorDataFloat(0, m_Data),
+          GetOutputTensorDataFloat(0, m_Data),
+          GetTensorInfo(m_Data.m_Inputs[0]));
+}
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefRsqrtFloat32Workload.hpp b/src/backends/reference/workloads/RefRsqrtFloat32Workload.hpp
new file mode 100644
index 0000000000..9d1b4505fe
--- /dev/null
+++ b/src/backends/reference/workloads/RefRsqrtFloat32Workload.hpp
@@ -0,0 +1,21 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <backendsCommon/WorkloadData.hpp>
+
+namespace armnn
+{
+
+class RefRsqrtFloat32Workload : public Float32Workload<RsqrtQueueDescriptor>
+{
+public:
+    using Float32Workload<RsqrtQueueDescriptor>::Float32Workload;
+    virtual void Execute() const override;
+};
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefWorkloads.hpp b/src/backends/reference/workloads/RefWorkloads.hpp
index ddce68e60c..8beb03fe32 100644
--- a/src/backends/reference/workloads/RefWorkloads.hpp
+++ b/src/backends/reference/workloads/RefWorkloads.hpp
@@ -59,3 +59,4 @@
 #include "RefBatchToSpaceNdUint8Workload.hpp"
 #include "RefBatchToSpaceNdFloat32Workload.hpp"
 #include "RefDebugWorkload.hpp"
+#include "RefRsqrtFloat32Workload.hpp"
diff --git a/src/backends/reference/workloads/Rsqrt.cpp b/src/backends/reference/workloads/Rsqrt.cpp
new file mode 100644
index 0000000000..cee38fc1f1
--- /dev/null
+++ b/src/backends/reference/workloads/Rsqrt.cpp
@@ -0,0 +1,23 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "Rsqrt.hpp"
+
+#include <cmath>
+
+namespace armnn
+{
+
+void Rsqrt(const float* in,
+           float* out,
+           const TensorInfo& tensorInfo)
+{
+    for (size_t i = 0; i < tensorInfo.GetNumElements(); i++)
+    {
+        out[i] = 1.f / sqrtf(in[i]);
+    }
+}
+
+} //namespace armnn
+\ No newline at end of file
diff --git a/src/backends/reference/workloads/Rsqrt.hpp b/src/backends/reference/workloads/Rsqrt.hpp
new file mode 100644
index 0000000000..35cacede66
--- /dev/null
+++ b/src/backends/reference/workloads/Rsqrt.hpp
@@ -0,0 +1,18 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include <armnn/Tensor.hpp>
+#include <armnn/Types.hpp>
+
+namespace armnn
+{
+
+/// Performs the reciprocal squareroot function elementwise
+/// on the inputs to give the outputs.
+void Rsqrt(const float* in,
+           float* out,
+           const TensorInfo& tensorInfo);
+
+} //namespace armnn