diff options
Diffstat (limited to 'src/backends/cl/workloads')
-rw-r--r-- | src/backends/cl/workloads/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClStridedSliceWorkload.cpp | 92 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClStridedSliceWorkload.hpp | 32 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloadUtils.hpp | 21 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloads.hpp | 1 |
5 files changed, 148 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index b7571f6895..11a0fd2db2 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -57,6 +57,8 @@ list(APPEND armnnClBackendWorkloads_sources ClSoftmaxUint8Workload.cpp ClSoftmaxUint8Workload.hpp ClSplitterWorkload.hpp + ClStridedSliceWorkload.cpp + ClStridedSliceWorkload.hpp ClSubtractionWorkload.cpp ClSubtractionWorkload.hpp ClWorkloads.hpp diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp new file mode 100644 index 0000000000..e51fa34233 --- /dev/null +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp @@ -0,0 +1,92 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClStridedSliceWorkload.hpp" + +#include "ClWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeUtils.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <backendsCommon/CpuTensorHandle.hpp> + +#include <cl/ClLayerSupport.hpp> +#include <cl/ClTensorHandle.hpp> +#include <cl/ClLayerSupport.hpp> + +namespace armnn +{ + +using namespace armcomputetensorutils; + +arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const StridedSliceDescriptor& descriptor) +{ + const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); + + arm_compute::Coordinates starts; + arm_compute::Coordinates ends; + arm_compute::Coordinates strides; + + std::tie(starts, ends, strides) = SetClStridedSliceData(descriptor.m_Begin, descriptor.m_End, descriptor.m_Stride); + + int32_t begin_mask = descriptor.m_BeginMask; + int32_t end_mask = descriptor.m_EndMask; + int32_t shrink_axis_mask = descriptor.m_ShrinkAxisMask; + + return arm_compute::CLStridedSlice::validate(&aclInputInfo, + &aclOutputInfo, + starts, + ends, + strides, + begin_mask, + end_mask, + shrink_axis_mask); +} + +ClStridedSliceWorkload::ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, + const WorkloadInfo& info) + : BaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClStridedSliceWorkload", 1, 1); + + arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + arm_compute::Coordinates starts; + arm_compute::Coordinates ends; + arm_compute::Coordinates strides; + + std::tie(starts, ends, strides) = SetClStridedSliceData(m_Data.m_Parameters.m_Begin, + m_Data.m_Parameters.m_End, + m_Data.m_Parameters.m_Stride); + + int32_t begin_mask = m_Data.m_Parameters.m_BeginMask; + int32_t end_mask = m_Data.m_Parameters.m_EndMask; + int32_t shrink_axis_mask = m_Data.m_Parameters.m_ShrinkAxisMask; + + arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); + input.info()->set_data_layout(aclDataLayout); + output.info()->set_data_layout(aclDataLayout); + + m_StridedSliceLayer.configure(&input, + &output, + starts, + ends, + strides, + begin_mask, + end_mask, + shrink_axis_mask); +} + +void ClStridedSliceWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClStridedSliceWorkload_Execute"); + RunClFunction(m_StridedSliceLayer, CHECK_LOCATION()); +} + +} //namespace armnn diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.hpp b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp new file mode 100644 index 0000000000..617ec7c021 --- /dev/null +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp @@ -0,0 +1,32 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <armnn/Tensor.hpp> +#include <armnn/Descriptors.hpp> + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/runtime/CL/CLFunctions.h> + +namespace armnn +{ + +arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const StridedSliceDescriptor& descriptor); + +class ClStridedSliceWorkload : public BaseWorkload<StridedSliceQueueDescriptor> +{ +public: + ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info); + void Execute() const override; + +private: + mutable arm_compute::CLStridedSlice m_StridedSliceLayer; +}; + +} //namespace armnn diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp index 3bee2427f0..32dacdfc61 100644 --- a/src/backends/cl/workloads/ClWorkloadUtils.hpp +++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp @@ -39,6 +39,27 @@ void CopyArmComputeClTensorData(arm_compute::CLTensor& dstTensor, const T* srcDa dstTensor.unmap(); } +inline auto SetClStridedSliceData(const std::vector<int>& m_begin, + const std::vector<int>& m_end, + const std::vector<int>& m_stride) +{ + arm_compute::Coordinates starts; + arm_compute::Coordinates ends; + arm_compute::Coordinates strides; + + unsigned int num_dims = static_cast<unsigned int>(m_begin.size()); + + for (unsigned int i = 0; i < num_dims; i++) { + unsigned int revertedIndex = num_dims - i - 1; + + starts.set(i, static_cast<int>(m_begin[revertedIndex])); + ends.set(i, static_cast<int>(m_end[revertedIndex])); + strides.set(i, static_cast<int>(m_stride[revertedIndex])); + } + + return std::make_tuple(starts, ends, strides); +} + inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor, const ConstCpuTensorHandle* handle) { diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index 39ecc53dc3..9e74327717 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -28,6 +28,7 @@ #include "ClSoftmaxFloatWorkload.hpp" #include "ClSoftmaxUint8Workload.hpp" #include "ClSplitterWorkload.hpp" +#include "ClStridedSliceWorkload.hpp" #include "ClSubtractionWorkload.hpp" #include "ClConvertFp16ToFp32Workload.hpp" #include "ClConvertFp32ToFp16Workload.hpp" |