diff options
Diffstat (limited to 'src/backends/cl/workloads')
120 files changed, 263 insertions, 261 deletions
diff --git a/src/backends/cl/workloads/ClAbsWorkload.cpp b/src/backends/cl/workloads/ClAbsWorkload.cpp index eeaec54439..c108bd4432 100644 --- a/src/backends/cl/workloads/ClAbsWorkload.cpp +++ b/src/backends/cl/workloads/ClAbsWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,7 +27,7 @@ arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorI ClAbsWorkload::ClAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<AbsQueueDescriptor>(descriptor, info) + : ClBaseWorkload<AbsQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClAbsWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClAbsWorkload.hpp b/src/backends/cl/workloads/ClAbsWorkload.hpp index fb34fe3918..2ed3eac07b 100644 --- a/src/backends/cl/workloads/ClAbsWorkload.hpp +++ b/src/backends/cl/workloads/ClAbsWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClAbsWorkload : public BaseWorkload<AbsQueueDescriptor> +class ClAbsWorkload : public ClBaseWorkload<AbsQueueDescriptor> { public: ClAbsWorkload(const AbsQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClAdditionWorkload.cpp b/src/backends/cl/workloads/ClAdditionWorkload.cpp index ce51b9f4fe..afdd1bb23a 100644 --- a/src/backends/cl/workloads/ClAdditionWorkload.cpp +++ b/src/backends/cl/workloads/ClAdditionWorkload.cpp @@ -21,7 +21,7 @@ static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::Co ClAdditionWorkload::ClAdditionWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<AdditionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<AdditionQueueDescriptor>(descriptor, info) { this->m_Data.ValidateInputsOutputs("ClAdditionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClAdditionWorkload.hpp b/src/backends/cl/workloads/ClAdditionWorkload.hpp index 4b26be333f..4131abf65f 100644 --- a/src/backends/cl/workloads/ClAdditionWorkload.hpp +++ b/src/backends/cl/workloads/ClAdditionWorkload.hpp @@ -1,18 +1,18 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> namespace armnn { -class ClAdditionWorkload : public BaseWorkload<AdditionQueueDescriptor> +class ClAdditionWorkload : public ClBaseWorkload<AdditionQueueDescriptor> { public: ClAdditionWorkload(const AdditionQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp b/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp index 4b1dc1ea81..4305b255c0 100644 --- a/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp +++ b/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClArgMinMaxWorkloadValidate(const TensorInfo& input, ClArgMinMaxWorkload::ClArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClArgMinMaxWorkload_Construct", diff --git a/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp b/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp index aa36e0847a..22a03e668b 100644 --- a/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp +++ b/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLArgMinMaxLayer.h> @@ -17,7 +17,7 @@ arm_compute::Status ClArgMinMaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ArgMinMaxDescriptor& descriptor); -class ClArgMinMaxWorkload : public BaseWorkload<ArgMinMaxQueueDescriptor> +class ClArgMinMaxWorkload : public ClBaseWorkload<ArgMinMaxQueueDescriptor> { public: ClArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp index 8e314fcdf0..992abc2f56 100644 --- a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp index e36ab68ba5..dc76703382 100644 --- a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/CLTensor.h> #include <arm_compute/runtime/CL/functions/CLBatchNormalizationLayer.h> diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp index c6bd624815..8a9a33b16b 100644 --- a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp +++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ using namespace armcomputetensorutils; ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) + : ClBaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClBatchToSpaceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp index 9e5ebff842..5026dc3aaf 100644 --- a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp +++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLBatchToSpaceLayer.h> namespace armnn @@ -15,7 +15,7 @@ arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const BatchToSpaceNdDescriptor& descriptor); -class ClBatchToSpaceNdWorkload : public BaseWorkload<BatchToSpaceNdQueueDescriptor> +class ClBatchToSpaceNdWorkload : public ClBaseWorkload<BatchToSpaceNdQueueDescriptor> { public: ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClCastWorkload.cpp b/src/backends/cl/workloads/ClCastWorkload.cpp index 9606385720..25d52c8356 100644 --- a/src/backends/cl/workloads/ClCastWorkload.cpp +++ b/src/backends/cl/workloads/ClCastWorkload.cpp @@ -28,7 +28,7 @@ arm_compute::Status ClCastValidate(const TensorInfo& input, const TensorInfo& ou ClCastWorkload::ClCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<CastQueueDescriptor>(descriptor, info) + : ClBaseWorkload<CastQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClCastWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClCastWorkload.hpp b/src/backends/cl/workloads/ClCastWorkload.hpp index d36c1b19e8..53a25bdc93 100644 --- a/src/backends/cl/workloads/ClCastWorkload.hpp +++ b/src/backends/cl/workloads/ClCastWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLCast.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClCastValidate(const TensorInfo& input, const TensorInfo& output); -class ClCastWorkload : public BaseWorkload<CastQueueDescriptor> +class ClCastWorkload : public ClBaseWorkload<CastQueueDescriptor> { public: ClCastWorkload(const CastQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp index 5d3e66c782..bf2958782e 100644 --- a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp @@ -54,7 +54,7 @@ arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, ClChannelShuffleWorkload::ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClChannelShufflenWorkload_Construct", diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp index 972b2dd54a..9002e66142 100644 --- a/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLChannelShuffleLayer.h> @@ -17,7 +17,7 @@ arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, const TensorInfo& output, const ChannelShuffleDescriptor& descriptor); -class ClChannelShuffleWorkload : public BaseWorkload<ChannelShuffleQueueDescriptor> +class ClChannelShuffleWorkload : public ClBaseWorkload<ChannelShuffleQueueDescriptor> { public: ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClComparisonWorkload.cpp b/src/backends/cl/workloads/ClComparisonWorkload.cpp index a66bd6cba1..2ae7b3bed6 100644 --- a/src/backends/cl/workloads/ClComparisonWorkload.cpp +++ b/src/backends/cl/workloads/ClComparisonWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -42,7 +42,7 @@ arm_compute::Status ClComparisonWorkloadValidate(const TensorInfo& input0, ClComparisonWorkload::ClComparisonWorkload(const ComparisonQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ComparisonQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ComparisonQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonComparisonWorkload_Construct", diff --git a/src/backends/cl/workloads/ClComparisonWorkload.hpp b/src/backends/cl/workloads/ClComparisonWorkload.hpp index 662c1fa826..d976ef322e 100644 --- a/src/backends/cl/workloads/ClComparisonWorkload.hpp +++ b/src/backends/cl/workloads/ClComparisonWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLComparison.h> @@ -17,7 +17,7 @@ arm_compute::Status ClComparisonWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ComparisonDescriptor& descriptor); -class ClComparisonWorkload : public BaseWorkload<ComparisonQueueDescriptor> +class ClComparisonWorkload : public ClBaseWorkload<ComparisonQueueDescriptor> { public: ClComparisonWorkload(const ComparisonQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConcatWorkload.cpp b/src/backends/cl/workloads/ClConcatWorkload.cpp index 50f2acb62b..53c4e2c7ff 100644 --- a/src/backends/cl/workloads/ClConcatWorkload.cpp +++ b/src/backends/cl/workloads/ClConcatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "ClConcatWorkload.hpp" @@ -48,7 +48,7 @@ arm_compute::Status ClConcatWorkloadValidate(const std::vector<const TensorInfo* ClConcatWorkload::ClConcatWorkload(const ConcatQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) -: BaseWorkload<ConcatQueueDescriptor>(descriptor, info) +: ClBaseWorkload<ConcatQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClConcatWorkload_Construct", diff --git a/src/backends/cl/workloads/ClConcatWorkload.hpp b/src/backends/cl/workloads/ClConcatWorkload.hpp index f1d780e914..327826c3b4 100644 --- a/src/backends/cl/workloads/ClConcatWorkload.hpp +++ b/src/backends/cl/workloads/ClConcatWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -18,7 +18,7 @@ arm_compute::Status ClConcatWorkloadValidate(const std::vector<const TensorInfo* const TensorInfo& output, const OriginsDescriptor& descriptor); -class ClConcatWorkload : public BaseWorkload<ConcatQueueDescriptor> +class ClConcatWorkload : public ClBaseWorkload<ConcatQueueDescriptor> { public: ClConcatWorkload(const ConcatQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConstantWorkload.cpp b/src/backends/cl/workloads/ClConstantWorkload.cpp index cd493057a2..d6a4ad66ef 100644 --- a/src/backends/cl/workloads/ClConstantWorkload.cpp +++ b/src/backends/cl/workloads/ClConstantWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -44,7 +44,7 @@ arm_compute::Status ClConstantWorkloadValidate(const TensorInfo& output) ClConstantWorkload::ClConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext&) - : BaseWorkload<ConstantQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ConstantQueueDescriptor>(descriptor, info) , m_RanOnce(false) { } diff --git a/src/backends/cl/workloads/ClConstantWorkload.hpp b/src/backends/cl/workloads/ClConstantWorkload.hpp index 39e49e7d14..96582636a2 100644 --- a/src/backends/cl/workloads/ClConstantWorkload.hpp +++ b/src/backends/cl/workloads/ClConstantWorkload.hpp @@ -1,12 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <arm_compute/core/Error.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/CL/CLCompileContext.h> @@ -14,7 +14,7 @@ namespace armnn { arm_compute::Status ClConstantWorkloadValidate(const TensorInfo& output); -class ClConstantWorkload : public BaseWorkload<ConstantQueueDescriptor> +class ClConstantWorkload : public ClBaseWorkload<ConstantQueueDescriptor> { public: ClConstantWorkload(const ConstantQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp index ccea7c84b8..867770a112 100644 --- a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp +++ b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp index d831cc1dc0..b392c0be2e 100644 --- a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp +++ b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp index 9b38b22019..017fcaf454 100644 --- a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp +++ b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp index df25072840..1d777b5256 100644 --- a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp +++ b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp index 95753053dd..705e92d307 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -67,7 +67,7 @@ ClConvolution2dWorkload::ClConvolution2dWorkload(const Convolution2dQueueDescrip std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext, const bool isFastMathEnabled) - : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) , m_ConvolutionLayer(memoryManager) { ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClConvolution2dWorkload"); diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.hpp b/src/backends/cl/workloads/ClConvolution2dWorkload.hpp index e0921ed7ce..8a4599df47 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.hpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLConvolutionLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -26,7 +26,7 @@ arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class ClConvolution2dWorkload : public BaseWorkload<Convolution2dQueueDescriptor> +class ClConvolution2dWorkload : public ClBaseWorkload<Convolution2dQueueDescriptor> { public: ClConvolution2dWorkload(const Convolution2dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConvolution3dWorkload.cpp b/src/backends/cl/workloads/ClConvolution3dWorkload.cpp index a47a3be2df..b096562747 100644 --- a/src/backends/cl/workloads/ClConvolution3dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution3dWorkload.cpp @@ -58,7 +58,7 @@ ClConvolution3dWorkload::ClConvolution3dWorkload(const Convolution3dQueueDescrip std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext, const bool isFastMathEnabled) - : BaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) , m_ConvolutionLayer() { IgnoreUnused(memoryManager); diff --git a/src/backends/cl/workloads/ClConvolution3dWorkload.hpp b/src/backends/cl/workloads/ClConvolution3dWorkload.hpp index 850cf9b1f2..0c5b233a41 100644 --- a/src/backends/cl/workloads/ClConvolution3dWorkload.hpp +++ b/src/backends/cl/workloads/ClConvolution3dWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLConv3D.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -23,7 +23,7 @@ arm_compute::Status ClConvolution3dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class ClConvolution3dWorkload : public BaseWorkload<Convolution3dQueueDescriptor> +class ClConvolution3dWorkload : public ClBaseWorkload<Convolution3dQueueDescriptor> { public: ClConvolution3dWorkload(const Convolution3dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp b/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp index 75a87c7000..28d700c2a0 100644 --- a/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp +++ b/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClDepthToSpaceWorkloadValidate(const TensorInfo& input, ClDepthToSpaceWorkload::ClDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClDepthToSpaceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp b/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp index 014fbb6472..3599b60d8a 100644 --- a/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp +++ b/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDepthToSpaceLayer.h> @@ -18,7 +18,7 @@ arm_compute::Status ClDepthToSpaceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const DepthToSpaceDescriptor& descriptor); -class ClDepthToSpaceWorkload : public BaseWorkload<DepthToSpaceQueueDescriptor> +class ClDepthToSpaceWorkload : public ClBaseWorkload<DepthToSpaceQueueDescriptor> { public: ClDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp index 73396d6045..f6a071ab98 100644 --- a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp +++ b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -76,7 +76,7 @@ ClDepthwiseConvolutionWorkload::ClDepthwiseConvolutionWorkload( const DepthwiseConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp index aab8c852c1..7a99d6c466 100644 --- a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp +++ b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/core/Error.h> @@ -21,7 +21,7 @@ arm_compute::Status ClDepthwiseConvolutionWorkloadValidate(const TensorInfo& inp const Optional<TensorInfo>& biases, const ActivationDescriptor* activationDescriptor = nullptr); -class ClDepthwiseConvolutionWorkload : public BaseWorkload<DepthwiseConvolution2dQueueDescriptor> +class ClDepthwiseConvolutionWorkload : public ClBaseWorkload<DepthwiseConvolution2dQueueDescriptor> { public: using BaseWorkload<DepthwiseConvolution2dQueueDescriptor>::m_Data; diff --git a/src/backends/cl/workloads/ClDequantizeWorkload.cpp b/src/backends/cl/workloads/ClDequantizeWorkload.cpp index 772d126d65..0081fb8d25 100644 --- a/src/backends/cl/workloads/ClDequantizeWorkload.cpp +++ b/src/backends/cl/workloads/ClDequantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -30,7 +30,7 @@ arm_compute::Status ClDequantizeWorkloadValidate(const TensorInfo& input, const ClDequantizeWorkload::ClDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, const WorkloadInfo& workloadInfo, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DequantizeQueueDescriptor>(descriptor, workloadInfo) + : ClBaseWorkload<DequantizeQueueDescriptor>(descriptor, workloadInfo) { m_Data.ValidateInputsOutputs("ClDequantizeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClDequantizeWorkload.hpp b/src/backends/cl/workloads/ClDequantizeWorkload.hpp index 24babd36c9..eaf7fb99ef 100644 --- a/src/backends/cl/workloads/ClDequantizeWorkload.hpp +++ b/src/backends/cl/workloads/ClDequantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDequantizationLayer.h> @@ -14,7 +14,7 @@ namespace armnn arm_compute::Status ClDequantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClDequantizeWorkload : public BaseWorkload<DequantizeQueueDescriptor> +class ClDequantizeWorkload : public ClBaseWorkload<DequantizeQueueDescriptor> { public: ClDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDivisionWorkload.cpp b/src/backends/cl/workloads/ClDivisionWorkload.cpp index 9c30d9143e..cfcb1046cc 100644 --- a/src/backends/cl/workloads/ClDivisionWorkload.cpp +++ b/src/backends/cl/workloads/ClDivisionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -34,7 +34,7 @@ arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, ClDivisionWorkload::ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DivisionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DivisionQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClDivisionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClDivisionWorkload.hpp b/src/backends/cl/workloads/ClDivisionWorkload.hpp index 8018f5a522..786dcc8f12 100644 --- a/src/backends/cl/workloads/ClDivisionWorkload.hpp +++ b/src/backends/cl/workloads/ClDivisionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -17,14 +17,14 @@ arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class ClDivisionWorkload : public BaseWorkload<DivisionQueueDescriptor> +class ClDivisionWorkload : public ClBaseWorkload<DivisionQueueDescriptor> { public: ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext); - using BaseWorkload<DivisionQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<DivisionQueueDescriptor>::ClBaseWorkload; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClExpWorkload.cpp b/src/backends/cl/workloads/ClExpWorkload.cpp index eeb6637705..15da905051 100644 --- a/src/backends/cl/workloads/ClExpWorkload.cpp +++ b/src/backends/cl/workloads/ClExpWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorI ClExpWorkload::ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClExpWorkload_Construct", diff --git a/src/backends/cl/workloads/ClExpWorkload.hpp b/src/backends/cl/workloads/ClExpWorkload.hpp index e1f74f8db3..9e7f4acb3c 100644 --- a/src/backends/cl/workloads/ClExpWorkload.hpp +++ b/src/backends/cl/workloads/ClExpWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClExpWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClExpWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClFillWorkload.cpp b/src/backends/cl/workloads/ClFillWorkload.cpp index 2f95bc564c..d0a43a2cee 100644 --- a/src/backends/cl/workloads/ClFillWorkload.cpp +++ b/src/backends/cl/workloads/ClFillWorkload.cpp @@ -18,7 +18,7 @@ using namespace armcomputetensorutils; ClFillWorkload::ClFillWorkload(const FillQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<FillQueueDescriptor>(descriptor, info) + : ClBaseWorkload<FillQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClFillWorkload_Construct", diff --git a/src/backends/cl/workloads/ClFillWorkload.hpp b/src/backends/cl/workloads/ClFillWorkload.hpp index b0f9fe19e1..f104f78d6f 100644 --- a/src/backends/cl/workloads/ClFillWorkload.hpp +++ b/src/backends/cl/workloads/ClFillWorkload.hpp @@ -6,12 +6,12 @@ #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLFill.h> namespace armnn { -class ClFillWorkload : public BaseWorkload<FillQueueDescriptor> +class ClFillWorkload : public ClBaseWorkload<FillQueueDescriptor> { public: ClFillWorkload(const FillQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClFloorFloatWorkload.cpp b/src/backends/cl/workloads/ClFloorFloatWorkload.cpp index 5db8cc6a7d..679e225c63 100644 --- a/src/backends/cl/workloads/ClFloorFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClFloorFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClFloorFloatWorkload.hpp b/src/backends/cl/workloads/ClFloorFloatWorkload.hpp index 4e09311867..5740c6887a 100644 --- a/src/backends/cl/workloads/ClFloorFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClFloorFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp index 532d0d45da..3eb53e64b4 100644 --- a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp +++ b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -50,7 +50,7 @@ ClFullyConnectedWorkload::ClFullyConnectedWorkload( const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info), m_FullyConnectedLayer(memoryManager) + : ClBaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info), m_FullyConnectedLayer(memoryManager) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp b/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp index 6576fb2078..210757779f 100644 --- a/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp +++ b/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -22,15 +22,15 @@ arm_compute::Status ClFullyConnectedWorkloadValidate(const TensorInfo& input, const FullyConnectedDescriptor& descriptor, const ActivationDescriptor* activationDescriptor = nullptr); -class ClFullyConnectedWorkload : public armnn::BaseWorkload<armnn::FullyConnectedQueueDescriptor> +class ClFullyConnectedWorkload : public ClBaseWorkload<FullyConnectedQueueDescriptor> { public: - ClFullyConnectedWorkload(const armnn::FullyConnectedQueueDescriptor& descriptor, - const armnn::WorkloadInfo& info, + ClFullyConnectedWorkload(const FullyConnectedQueueDescriptor& descriptor, + const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext); - using armnn::BaseWorkload<armnn::FullyConnectedQueueDescriptor>::m_Data; + using ClBaseWorkload<FullyConnectedQueueDescriptor>::m_Data; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClGatherWorkload.cpp b/src/backends/cl/workloads/ClGatherWorkload.cpp index 06fa5af65e..55bf422d19 100644 --- a/src/backends/cl/workloads/ClGatherWorkload.cpp +++ b/src/backends/cl/workloads/ClGatherWorkload.cpp @@ -29,7 +29,7 @@ arm_compute::Status ClGatherWorkloadValidate(const TensorInfo& input, ClGatherWorkload::ClGatherWorkload(const GatherQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<GatherQueueDescriptor>(descriptor, info) + : ClBaseWorkload<GatherQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClGatherWorkload_Construct", diff --git a/src/backends/cl/workloads/ClGatherWorkload.hpp b/src/backends/cl/workloads/ClGatherWorkload.hpp index e6d198dc27..264e276358 100644 --- a/src/backends/cl/workloads/ClGatherWorkload.hpp +++ b/src/backends/cl/workloads/ClGatherWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLGather.h> @@ -16,7 +16,7 @@ arm_compute::Status ClGatherWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const GatherDescriptor& descriptor); -class ClGatherWorkload : public BaseWorkload<GatherQueueDescriptor> +class ClGatherWorkload : public ClBaseWorkload<GatherQueueDescriptor> { public: ClGatherWorkload(const GatherQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp index 58e65ddab7..54114c11d3 100644 --- a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp +++ b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ ClInstanceNormalizationWorkload::ClInstanceNormalizationWorkload( const InstanceNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) + : ClBaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClInstanceNormalizationWorkload_Construct", diff --git a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp index 250cd4d1b1..f6e49722e6 100644 --- a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp +++ b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLInstanceNormalizationLayer.h> @@ -16,7 +16,7 @@ arm_compute::Status ClInstanceNormalizationWorkloadValidate(const TensorInfo& in const TensorInfo& output, const InstanceNormalizationDescriptor& descriptor); -class ClInstanceNormalizationWorkload : public BaseWorkload<InstanceNormalizationQueueDescriptor> +class ClInstanceNormalizationWorkload : public ClBaseWorkload<InstanceNormalizationQueueDescriptor> { public: ClInstanceNormalizationWorkload(const InstanceNormalizationQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp index 39cbe711e2..b34153fff0 100644 --- a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp index 12ca0a10b1..cfa1a97eec 100644 --- a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp b/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp index b75c6b0266..67c366d1b1 100644 --- a/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp +++ b/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp @@ -29,7 +29,7 @@ ClLogSoftmaxWorkload::ClLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& desc const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) , m_LogSoftmaxLayer(memoryManager) { // Report Profiling Details diff --git a/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp b/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp index 4eb86eac8a..988408c9b7 100644 --- a/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp +++ b/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp @@ -12,7 +12,7 @@ #include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" namespace armnn { @@ -21,7 +21,7 @@ arm_compute::Status ClLogSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const LogSoftmaxDescriptor& descriptor); -class ClLogSoftmaxWorkload : public BaseWorkload<LogSoftmaxQueueDescriptor> +class ClLogSoftmaxWorkload : public ClBaseWorkload<LogSoftmaxQueueDescriptor> { public: ClLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, diff --git a/src/backends/cl/workloads/ClLogWorkload.cpp b/src/backends/cl/workloads/ClLogWorkload.cpp index d13a0eaa3f..024a634093 100644 --- a/src/backends/cl/workloads/ClLogWorkload.cpp +++ b/src/backends/cl/workloads/ClLogWorkload.cpp @@ -26,7 +26,7 @@ arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorI ClLogWorkload::ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClLogWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClLogWorkload.hpp b/src/backends/cl/workloads/ClLogWorkload.hpp index 5a2992a64c..7eec3fc8f4 100644 --- a/src/backends/cl/workloads/ClLogWorkload.hpp +++ b/src/backends/cl/workloads/ClLogWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClLogWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClLogWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalAndWorkload.cpp b/src/backends/cl/workloads/ClLogicalAndWorkload.cpp index 481d87c4ff..c37a300a1c 100644 --- a/src/backends/cl/workloads/ClLogicalAndWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalAndWorkload.cpp @@ -34,7 +34,7 @@ arm_compute::Status ClLogicalAndWorkloadValidate(const TensorInfo& input0, ClLogicalAndWorkload::ClLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalAndWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalAndWorkload.hpp b/src/backends/cl/workloads/ClLogicalAndWorkload.hpp index 547995eed9..571b9af9f2 100644 --- a/src/backends/cl/workloads/ClLogicalAndWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalAndWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalAnd.h> @@ -17,7 +17,7 @@ arm_compute::Status ClLogicalAndWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClLogicalAndWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class ClLogicalAndWorkload : public ClBaseWorkload<LogicalBinaryQueueDescriptor> { public: ClLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalNotWorkload.cpp b/src/backends/cl/workloads/ClLogicalNotWorkload.cpp index c61f8443b7..9d2f8fd4d2 100644 --- a/src/backends/cl/workloads/ClLogicalNotWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalNotWorkload.cpp @@ -31,7 +31,7 @@ arm_compute::Status ClLogicalNotWorkloadValidate(const TensorInfo& input, ClLogicalNotWorkload::ClLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalNotWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalNotWorkload.hpp b/src/backends/cl/workloads/ClLogicalNotWorkload.hpp index 2dc0d095f8..7623492e8d 100644 --- a/src/backends/cl/workloads/ClLogicalNotWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalNotWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalNot.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClLogicalNotWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClLogicalNotWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClLogicalNotWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalOrWorkload.cpp b/src/backends/cl/workloads/ClLogicalOrWorkload.cpp index 307af2086a..7e3cce1d95 100644 --- a/src/backends/cl/workloads/ClLogicalOrWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalOrWorkload.cpp @@ -34,7 +34,7 @@ arm_compute::Status ClLogicalOrWorkloadValidate(const TensorInfo& input0, ClLogicalOrWorkload::ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalOrWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalOrWorkload.hpp b/src/backends/cl/workloads/ClLogicalOrWorkload.hpp index ada72c2654..03c8114cb6 100644 --- a/src/backends/cl/workloads/ClLogicalOrWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalOrWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalOr.h> @@ -17,7 +17,7 @@ arm_compute::Status ClLogicalOrWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClLogicalOrWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class ClLogicalOrWorkload : public ClBaseWorkload<LogicalBinaryQueueDescriptor> { public: ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLstmFloatWorkload.cpp b/src/backends/cl/workloads/ClLstmFloatWorkload.cpp index c7b644c46a..d8d95f5c74 100644 --- a/src/backends/cl/workloads/ClLstmFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClLstmFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClLstmFloatWorkload.hpp b/src/backends/cl/workloads/ClLstmFloatWorkload.hpp index bfa98d46b2..b9faca8b54 100644 --- a/src/backends/cl/workloads/ClLstmFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClLstmFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClMaximumWorkload.cpp b/src/backends/cl/workloads/ClMaximumWorkload.cpp index 421a5310a7..21f1a2324f 100644 --- a/src/backends/cl/workloads/ClMaximumWorkload.cpp +++ b/src/backends/cl/workloads/ClMaximumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClMaximumWorkloadValidate(const TensorInfo& input0, ClMaximumWorkload::ClMaximumWorkload(const MaximumQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MaximumQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MaximumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMaximumWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMaximumWorkload.hpp b/src/backends/cl/workloads/ClMaximumWorkload.hpp index 55a375b939..c453c0a47a 100644 --- a/src/backends/cl/workloads/ClMaximumWorkload.hpp +++ b/src/backends/cl/workloads/ClMaximumWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMaximumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClMaximumWorkload : public BaseWorkload<MaximumQueueDescriptor> +class ClMaximumWorkload : public ClBaseWorkload<MaximumQueueDescriptor> { public: ClMaximumWorkload(const MaximumQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMeanWorkload.cpp b/src/backends/cl/workloads/ClMeanWorkload.cpp index 074b4b2061..b59eb6f8e4 100644 --- a/src/backends/cl/workloads/ClMeanWorkload.cpp +++ b/src/backends/cl/workloads/ClMeanWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ arm_compute::Status ClMeanValidate(const TensorInfo& input, ClMeanWorkload::ClMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MeanQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MeanQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClMeanWorkload_Construct", diff --git a/src/backends/cl/workloads/ClMeanWorkload.hpp b/src/backends/cl/workloads/ClMeanWorkload.hpp index 0ea6c595d7..2a12cb44aa 100644 --- a/src/backends/cl/workloads/ClMeanWorkload.hpp +++ b/src/backends/cl/workloads/ClMeanWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReduceMean.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMeanValidate(const TensorInfo& input, const TensorInfo& output, const MeanDescriptor& descriptor); -class ClMeanWorkload : public BaseWorkload<MeanQueueDescriptor> +class ClMeanWorkload : public ClBaseWorkload<MeanQueueDescriptor> { public: ClMeanWorkload(const MeanQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMinimumWorkload.cpp b/src/backends/cl/workloads/ClMinimumWorkload.cpp index 934598c3dc..5c329062a3 100644 --- a/src/backends/cl/workloads/ClMinimumWorkload.cpp +++ b/src/backends/cl/workloads/ClMinimumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClMinimumWorkloadValidate(const TensorInfo& input0, ClMinimumWorkload::ClMinimumWorkload(const MinimumQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MinimumQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MinimumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMinimumWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMinimumWorkload.hpp b/src/backends/cl/workloads/ClMinimumWorkload.hpp index 061788f81a..31d821afb4 100644 --- a/src/backends/cl/workloads/ClMinimumWorkload.hpp +++ b/src/backends/cl/workloads/ClMinimumWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMinimumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClMinimumWorkload : public BaseWorkload<MinimumQueueDescriptor> +class ClMinimumWorkload : public ClBaseWorkload<MinimumQueueDescriptor> { public: ClMinimumWorkload(const MinimumQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMultiplicationWorkload.cpp b/src/backends/cl/workloads/ClMultiplicationWorkload.cpp index 0ef4d9a3de..99822b3a65 100644 --- a/src/backends/cl/workloads/ClMultiplicationWorkload.cpp +++ b/src/backends/cl/workloads/ClMultiplicationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -47,7 +47,7 @@ arm_compute::Status ClMultiplicationWorkloadValidate(const TensorInfo& input0, ClMultiplicationWorkload::ClMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMultiplicationWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp index 5db81d6f86..a01efb82c8 100644 --- a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp +++ b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPixelWiseMultiplication.h> @@ -17,14 +17,14 @@ arm_compute::Status ClMultiplicationWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class ClMultiplicationWorkload : public BaseWorkload<MultiplicationQueueDescriptor> +class ClMultiplicationWorkload : public ClBaseWorkload<MultiplicationQueueDescriptor> { public: ClMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext); - using BaseWorkload<MultiplicationQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<MultiplicationQueueDescriptor>::ClBaseWorkload; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClNegWorkload.cpp b/src/backends/cl/workloads/ClNegWorkload.cpp index c606189e83..94b5fcbdb6 100644 --- a/src/backends/cl/workloads/ClNegWorkload.cpp +++ b/src/backends/cl/workloads/ClNegWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorI ClNegWorkload::ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClNegWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClNegWorkload.hpp b/src/backends/cl/workloads/ClNegWorkload.hpp index 77092e1d7d..e43f3fef93 100644 --- a/src/backends/cl/workloads/ClNegWorkload.hpp +++ b/src/backends/cl/workloads/ClNegWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClNegWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClNegWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp index b61869b852..d98532d7d1 100644 --- a/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp index b3a16351cc..40b2693cd4 100644 --- a/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClPadWorkload.cpp b/src/backends/cl/workloads/ClPadWorkload.cpp index 4f8c34cb77..aecfb278c5 100644 --- a/src/backends/cl/workloads/ClPadWorkload.cpp +++ b/src/backends/cl/workloads/ClPadWorkload.cpp @@ -19,7 +19,7 @@ using namespace armcomputetensorutils; ClPadWorkload::ClPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PadQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PadQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPadWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPadWorkload.hpp b/src/backends/cl/workloads/ClPadWorkload.hpp index 83ec5a4825..06c206bfb9 100644 --- a/src/backends/cl/workloads/ClPadWorkload.hpp +++ b/src/backends/cl/workloads/ClPadWorkload.hpp @@ -1,17 +1,17 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPadLayer.h> namespace armnn { -class ClPadWorkload : public BaseWorkload<PadQueueDescriptor> +class ClPadWorkload : public ClBaseWorkload<PadQueueDescriptor> { public: ClPadWorkload(const PadQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClPermuteWorkload.cpp b/src/backends/cl/workloads/ClPermuteWorkload.cpp index 641e871d50..f3d12ae72c 100644 --- a/src/backends/cl/workloads/ClPermuteWorkload.cpp +++ b/src/backends/cl/workloads/ClPermuteWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClPermuteWorkloadValidate(const TensorInfo& input, ClPermuteWorkload::ClPermuteWorkload(const PermuteQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PermuteQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PermuteQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPermuteWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPermuteWorkload.hpp b/src/backends/cl/workloads/ClPermuteWorkload.hpp index f0f12d7b7a..a7afbc7b34 100644 --- a/src/backends/cl/workloads/ClPermuteWorkload.hpp +++ b/src/backends/cl/workloads/ClPermuteWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <armnn/TypesUtils.hpp> @@ -20,7 +20,7 @@ arm_compute::Status ClPermuteWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const PermuteDescriptor& descriptor); -class ClPermuteWorkload : public BaseWorkload<PermuteQueueDescriptor> +class ClPermuteWorkload : public ClBaseWorkload<PermuteQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/cl/workloads/ClPooling2dWorkload.cpp b/src/backends/cl/workloads/ClPooling2dWorkload.cpp index f967c6dd39..40a794ea2e 100644 --- a/src/backends/cl/workloads/ClPooling2dWorkload.cpp +++ b/src/backends/cl/workloads/ClPooling2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ ClPooling2dWorkload::ClPooling2dWorkload( const Pooling2dQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPooling2dWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPooling2dWorkload.hpp b/src/backends/cl/workloads/ClPooling2dWorkload.hpp index 451a28501a..ce583117e0 100644 --- a/src/backends/cl/workloads/ClPooling2dWorkload.hpp +++ b/src/backends/cl/workloads/ClPooling2dWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPoolingLayer.h> @@ -16,7 +16,7 @@ arm_compute::Status ClPooling2dWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const Pooling2dDescriptor& descriptor); -class ClPooling2dWorkload : public BaseWorkload<Pooling2dQueueDescriptor> +class ClPooling2dWorkload : public ClBaseWorkload<Pooling2dQueueDescriptor> { public: using BaseWorkload<Pooling2dQueueDescriptor>::m_Data; diff --git a/src/backends/cl/workloads/ClPreluWorkload.cpp b/src/backends/cl/workloads/ClPreluWorkload.cpp index 81d40db7b1..b2b8eebfaf 100644 --- a/src/backends/cl/workloads/ClPreluWorkload.cpp +++ b/src/backends/cl/workloads/ClPreluWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input, ClPreluWorkload::ClPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PreluQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PreluQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClPreluWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClPreluWorkload.hpp b/src/backends/cl/workloads/ClPreluWorkload.hpp index 6b0520f2e6..abc77708b9 100644 --- a/src/backends/cl/workloads/ClPreluWorkload.hpp +++ b/src/backends/cl/workloads/ClPreluWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPReluLayer.h> @@ -15,7 +15,7 @@ arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input, const TensorInfo& alpha, const TensorInfo& output); -class ClPreluWorkload : public BaseWorkload<PreluQueueDescriptor> +class ClPreluWorkload : public ClBaseWorkload<PreluQueueDescriptor> { public: ClPreluWorkload(const PreluQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQLstmWorkload.cpp b/src/backends/cl/workloads/ClQLstmWorkload.cpp index b2c1d6d63b..92090e666c 100644 --- a/src/backends/cl/workloads/ClQLstmWorkload.cpp +++ b/src/backends/cl/workloads/ClQLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ using namespace armcomputetensorutils; ClQLstmWorkload::ClQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<QLstmQueueDescriptor>(descriptor, info) + : ClBaseWorkload<QLstmQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClQLstmWorkload_Construct", diff --git a/src/backends/cl/workloads/ClQLstmWorkload.hpp b/src/backends/cl/workloads/ClQLstmWorkload.hpp index 6c389064d0..133665a6d5 100644 --- a/src/backends/cl/workloads/ClQLstmWorkload.hpp +++ b/src/backends/cl/workloads/ClQLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> #include <armnn/LstmParams.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "arm_compute/graph/Tensor.h" @@ -16,7 +16,7 @@ namespace armnn { -class ClQLstmWorkload : public BaseWorkload<QLstmQueueDescriptor> +class ClQLstmWorkload : public ClBaseWorkload<QLstmQueueDescriptor> { public: ClQLstmWorkload(const QLstmQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQuantizeWorkload.cpp b/src/backends/cl/workloads/ClQuantizeWorkload.cpp index be17edd7fd..add2f3d9a0 100644 --- a/src/backends/cl/workloads/ClQuantizeWorkload.cpp +++ b/src/backends/cl/workloads/ClQuantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,7 @@ arm_compute::Status ClQuantizeWorkloadValidate(const TensorInfo& input, ClQuantizeWorkload::ClQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<QuantizeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<QuantizeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClQuantizeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClQuantizeWorkload.hpp b/src/backends/cl/workloads/ClQuantizeWorkload.hpp index cf459b20e0..00833c4334 100644 --- a/src/backends/cl/workloads/ClQuantizeWorkload.hpp +++ b/src/backends/cl/workloads/ClQuantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLQuantizationLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClQuantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClQuantizeWorkload : public BaseWorkload<QuantizeQueueDescriptor> +class ClQuantizeWorkload : public ClBaseWorkload<QuantizeQueueDescriptor> { public: ClQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp b/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp index ad1d143aa7..0fb19ecd71 100644 --- a/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp +++ b/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -63,8 +63,8 @@ arm_compute::Status ClQuantizedLstmWorkloadValidate(const TensorInfo& input, con ClQuantizedLstmWorkload::ClQuantizedLstmWorkload(const QuantizedLstmQueueDescriptor &descriptor, const WorkloadInfo &info, - const arm_compute::CLCompileContext& clCompileContext): - BaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) { m_InputToInputWeightsTensor = std::make_unique<arm_compute::CLTensor>(); BuildArmComputeTensor(*m_InputToInputWeightsTensor, m_Data.m_InputToInputWeights->GetTensorInfo()); diff --git a/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp b/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp index 48b0b27525..65d874b5f3 100644 --- a/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp +++ b/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "ClBaseWorkload.hpp" + #include <armnn/QuantizedLstmParams.hpp> #include <armnn/backends/Workload.hpp> #include <armnn/backends/WorkloadData.hpp> @@ -19,7 +21,7 @@ arm_compute::Status ClQuantizedLstmWorkloadValidate(const TensorInfo& input, con const TensorInfo& output, const QuantizedLstmInputParamsInfo& paramsInfo); -class ClQuantizedLstmWorkload : public BaseWorkload<QuantizedLstmQueueDescriptor> +class ClQuantizedLstmWorkload : public ClBaseWorkload<QuantizedLstmQueueDescriptor> { public: ClQuantizedLstmWorkload(const QuantizedLstmQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClRankWorkload.hpp b/src/backends/cl/workloads/ClRankWorkload.hpp index b5a856ff07..8a7e2c2078 100644 --- a/src/backends/cl/workloads/ClRankWorkload.hpp +++ b/src/backends/cl/workloads/ClRankWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "ClWorkloadUtils.hpp" @@ -13,10 +13,10 @@ namespace armnn { -struct ClRankWorkload : public BaseWorkload<RankQueueDescriptor> +struct ClRankWorkload : public ClBaseWorkload<RankQueueDescriptor> { public: - using BaseWorkload<RankQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<RankQueueDescriptor>::ClBaseWorkload; virtual void Execute() const override { const ClTensorHandle* clTensorHandle = PolymorphicDowncast<const ClTensorHandle*>(m_Data.m_Inputs[0]); diff --git a/src/backends/cl/workloads/ClReduceWorkload.cpp b/src/backends/cl/workloads/ClReduceWorkload.cpp index b5f10292e5..ace76935c4 100644 --- a/src/backends/cl/workloads/ClReduceWorkload.cpp +++ b/src/backends/cl/workloads/ClReduceWorkload.cpp @@ -44,7 +44,7 @@ arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input, } ClReduceWorkload::ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ReduceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ReduceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClReduceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClReduceWorkload.hpp b/src/backends/cl/workloads/ClReduceWorkload.hpp index a9c1409dcf..c63c3137bd 100644 --- a/src/backends/cl/workloads/ClReduceWorkload.hpp +++ b/src/backends/cl/workloads/ClReduceWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReductionOperation.h> @@ -16,7 +16,7 @@ arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ReduceDescriptor& descriptor); -class ClReduceWorkload : public BaseWorkload<ReduceQueueDescriptor> +class ClReduceWorkload : public ClBaseWorkload<ReduceQueueDescriptor> { public: ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/cl/workloads/ClReshapeWorkload.cpp b/src/backends/cl/workloads/ClReshapeWorkload.cpp index 8ca05d0af1..b666e7cc7b 100644 --- a/src/backends/cl/workloads/ClReshapeWorkload.cpp +++ b/src/backends/cl/workloads/ClReshapeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -24,7 +24,7 @@ arm_compute::Status ClReshapeWorkloadValidate(const TensorInfo& input, ClReshapeWorkload::ClReshapeWorkload(const ReshapeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ReshapeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ReshapeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClReshapeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClReshapeWorkload.hpp b/src/backends/cl/workloads/ClReshapeWorkload.hpp index 9acfc838b4..d3533e64bd 100644 --- a/src/backends/cl/workloads/ClReshapeWorkload.hpp +++ b/src/backends/cl/workloads/ClReshapeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReshapeLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClReshapeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClReshapeWorkload : public BaseWorkload<ReshapeQueueDescriptor> +class ClReshapeWorkload : public ClBaseWorkload<ReshapeQueueDescriptor> { public: ClReshapeWorkload(const ReshapeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClResizeWorkload.cpp b/src/backends/cl/workloads/ClResizeWorkload.cpp index 628cbbd752..7d6d938d5e 100644 --- a/src/backends/cl/workloads/ClResizeWorkload.cpp +++ b/src/backends/cl/workloads/ClResizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -49,7 +49,7 @@ arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input, ClResizeWorkload::ClResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ResizeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ResizeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClResizeWorkload_Construct", diff --git a/src/backends/cl/workloads/ClResizeWorkload.hpp b/src/backends/cl/workloads/ClResizeWorkload.hpp index f062eb70b5..8a345514af 100644 --- a/src/backends/cl/workloads/ClResizeWorkload.hpp +++ b/src/backends/cl/workloads/ClResizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLScale.h> @@ -16,7 +16,7 @@ arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ResizeDescriptor& descriptor); -class ClResizeWorkload : public BaseWorkload<ResizeQueueDescriptor> +class ClResizeWorkload : public ClBaseWorkload<ResizeQueueDescriptor> { public: ClResizeWorkload(const ResizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.cpp b/src/backends/cl/workloads/ClRsqrtWorkload.cpp index b8ae2f6d59..3bc5f38166 100644 --- a/src/backends/cl/workloads/ClRsqrtWorkload.cpp +++ b/src/backends/cl/workloads/ClRsqrtWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const Tenso ClRsqrtWorkload::ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<RsqrtQueueDescriptor>(descriptor, info) + : ClBaseWorkload<RsqrtQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClRsqrtWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.hpp b/src/backends/cl/workloads/ClRsqrtWorkload.hpp index e53d576d6e..153aef5534 100644 --- a/src/backends/cl/workloads/ClRsqrtWorkload.hpp +++ b/src/backends/cl/workloads/ClRsqrtWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClRsqrtWorkload : public BaseWorkload<RsqrtQueueDescriptor> +class ClRsqrtWorkload : public ClBaseWorkload<RsqrtQueueDescriptor> { public: ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSinWorkload.cpp b/src/backends/cl/workloads/ClSinWorkload.cpp index 2989ac9691..bcab32fa9a 100644 --- a/src/backends/cl/workloads/ClSinWorkload.cpp +++ b/src/backends/cl/workloads/ClSinWorkload.cpp @@ -26,7 +26,7 @@ arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorI ClSinWorkload::ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClSinWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClSinWorkload.hpp b/src/backends/cl/workloads/ClSinWorkload.hpp index d6e799bf7e..5b7d70aea3 100644 --- a/src/backends/cl/workloads/ClSinWorkload.hpp +++ b/src/backends/cl/workloads/ClSinWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClSinWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClSinWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSliceWorkload.cpp b/src/backends/cl/workloads/ClSliceWorkload.cpp index f92bb378dc..3976e120d2 100644 --- a/src/backends/cl/workloads/ClSliceWorkload.cpp +++ b/src/backends/cl/workloads/ClSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input, ClSliceWorkload::ClSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SliceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSliceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSliceWorkload.hpp b/src/backends/cl/workloads/ClSliceWorkload.hpp index 1451a6df79..dba89641d0 100644 --- a/src/backends/cl/workloads/ClSliceWorkload.hpp +++ b/src/backends/cl/workloads/ClSliceWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLSlice.h> @@ -17,7 +17,7 @@ arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SliceDescriptor& descriptor); -class ClSliceWorkload : public BaseWorkload<SliceQueueDescriptor> +class ClSliceWorkload : public ClBaseWorkload<SliceQueueDescriptor> { public: ClSliceWorkload(const SliceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSoftmaxWorkload.cpp b/src/backends/cl/workloads/ClSoftmaxWorkload.cpp index 39684d83c1..99bc89e200 100644 --- a/src/backends/cl/workloads/ClSoftmaxWorkload.cpp +++ b/src/backends/cl/workloads/ClSoftmaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ ClSoftmaxWorkload::ClSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) , m_SoftmaxLayer(memoryManager) { // Report Profiling Details diff --git a/src/backends/cl/workloads/ClSoftmaxWorkload.hpp b/src/backends/cl/workloads/ClSoftmaxWorkload.hpp index 04b03c8f2b..09167a0e10 100644 --- a/src/backends/cl/workloads/ClSoftmaxWorkload.hpp +++ b/src/backends/cl/workloads/ClSoftmaxWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -11,7 +11,7 @@ #include <arm_compute/runtime/MemoryManagerOnDemand.h> #include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" namespace armnn { @@ -20,7 +20,7 @@ arm_compute::Status ClSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SoftmaxDescriptor& descriptor); -class ClSoftmaxWorkload : public BaseWorkload<SoftmaxQueueDescriptor> +class ClSoftmaxWorkload : public ClBaseWorkload<SoftmaxQueueDescriptor> { public: ClSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp index 9e6c00e9d0..220d2d1908 100644 --- a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp +++ b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,7 +48,7 @@ ClSpaceToBatchNdWorkload::ClSpaceToBatchNdWorkload( const SpaceToBatchNdQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSpaceToBatchNdWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp index ed9870da5e..948d13b934 100644 --- a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp +++ b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLSpaceToBatchLayer.h> @@ -19,7 +19,7 @@ arm_compute::Status ClSpaceToBatchNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToBatchNdDescriptor& descriptor); -class ClSpaceToBatchNdWorkload : public BaseWorkload<SpaceToBatchNdQueueDescriptor> +class ClSpaceToBatchNdWorkload : public ClBaseWorkload<SpaceToBatchNdQueueDescriptor> { public: ClSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp index 23b4d97c04..da1a350290 100644 --- a/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp +++ b/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ using namespace armcomputetensorutils; ClSpaceToDepthWorkload::ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSpaceToDepthWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp index ace3116b3e..202671d5fa 100644 --- a/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp +++ b/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLSpaceToDepthLayer.h> namespace armnn @@ -16,7 +16,7 @@ arm_compute::Status ClSpaceToDepthWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToDepthDescriptor& descriptor); -class ClSpaceToDepthWorkload : public BaseWorkload<SpaceToDepthQueueDescriptor> +class ClSpaceToDepthWorkload : public ClBaseWorkload<SpaceToDepthQueueDescriptor> { public: ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSplitterWorkload.cpp b/src/backends/cl/workloads/ClSplitterWorkload.cpp index 54454412e6..f4622ce26d 100644 --- a/src/backends/cl/workloads/ClSplitterWorkload.cpp +++ b/src/backends/cl/workloads/ClSplitterWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClSplitterWorkloadValidate(const TensorInfo& input, ClSplitterWorkload::ClSplitterWorkload(const SplitterQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext&) - : BaseWorkload<SplitterQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SplitterQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSplitterWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSplitterWorkload.hpp b/src/backends/cl/workloads/ClSplitterWorkload.hpp index eaeeebe55f..530d3c9145 100644 --- a/src/backends/cl/workloads/ClSplitterWorkload.hpp +++ b/src/backends/cl/workloads/ClSplitterWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -20,7 +20,7 @@ arm_compute::Status ClSplitterWorkloadValidate(const TensorInfo& input, const std::vector<std::reference_wrapper<TensorInfo>>& outputs, unsigned int splitAxis); -class ClSplitterWorkload : public BaseWorkload<SplitterQueueDescriptor> +class ClSplitterWorkload : public ClBaseWorkload<SplitterQueueDescriptor> { public: ClSplitterWorkload(const SplitterQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClStackWorkload.cpp b/src/backends/cl/workloads/ClStackWorkload.cpp index d239f00ed5..46b4702783 100644 --- a/src/backends/cl/workloads/ClStackWorkload.cpp +++ b/src/backends/cl/workloads/ClStackWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "ClStackWorkload.hpp" @@ -47,7 +47,7 @@ arm_compute::Status ClStackWorkloadValidate(const std::vector<const TensorInfo*> ClStackWorkload::ClStackWorkload(const StackQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) -: BaseWorkload<StackQueueDescriptor>(descriptor, info) +: ClBaseWorkload<StackQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClStackWorkload_Construct", diff --git a/src/backends/cl/workloads/ClStackWorkload.hpp b/src/backends/cl/workloads/ClStackWorkload.hpp index a7aa84d624..3a9d5ffee7 100644 --- a/src/backends/cl/workloads/ClStackWorkload.hpp +++ b/src/backends/cl/workloads/ClStackWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLStackLayer.h> @@ -15,7 +15,7 @@ arm_compute::Status ClStackWorkloadValidate(const std::vector<const TensorInfo*> const TensorInfo& output, const StackDescriptor& descriptor); -class ClStackWorkload : public BaseWorkload<StackQueueDescriptor> +class ClStackWorkload : public ClBaseWorkload<StackQueueDescriptor> { public: ClStackWorkload(const StackQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp index cf8fc37456..62a59feed4 100644 --- a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, ClStridedSliceWorkload::ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClStridedSliceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.hpp b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp index 1cd5a1df17..07df39aed3 100644 --- a/src/backends/cl/workloads/ClStridedSliceWorkload.hpp +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLStridedSlice.h> @@ -19,7 +19,7 @@ arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const StridedSliceDescriptor& descriptor); -class ClStridedSliceWorkload : public BaseWorkload<StridedSliceQueueDescriptor> +class ClStridedSliceWorkload : public ClBaseWorkload<StridedSliceQueueDescriptor> { public: ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSubtractionWorkload.cpp b/src/backends/cl/workloads/ClSubtractionWorkload.cpp index 3766c05a2b..789d457ff4 100644 --- a/src/backends/cl/workloads/ClSubtractionWorkload.cpp +++ b/src/backends/cl/workloads/ClSubtractionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,7 +21,7 @@ static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::Co ClSubtractionWorkload::ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SubtractionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SubtractionQueueDescriptor>(descriptor, info) { this->m_Data.ValidateInputsOutputs("ClSubtractionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClSubtractionWorkload.hpp b/src/backends/cl/workloads/ClSubtractionWorkload.hpp index 7107bcc035..c5dd72b9c1 100644 --- a/src/backends/cl/workloads/ClSubtractionWorkload.hpp +++ b/src/backends/cl/workloads/ClSubtractionWorkload.hpp @@ -1,18 +1,18 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> namespace armnn { -class ClSubtractionWorkload : public BaseWorkload<SubtractionQueueDescriptor> +class ClSubtractionWorkload : public ClBaseWorkload<SubtractionQueueDescriptor> { public: ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp index 385bece6fb..96c0a81a2f 100644 --- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -57,9 +57,9 @@ ClTransposeConvolution2dWorkload::ClTransposeConvolution2dWorkload( const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, - const arm_compute::CLCompileContext& clCompileContext) : - BaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info), - m_Layer(memoryManager) + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info) + , m_Layer(memoryManager) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp index c0ba8139fd..88cc0b3811 100644 --- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp +++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDeconvolutionLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -24,7 +24,7 @@ arm_compute::Status ClTransposeConvolution2dWorkloadValidate(const TensorInfo& i const TensorInfo& weights, const Optional<TensorInfo>& biases); -class ClTransposeConvolution2dWorkload : public BaseWorkload<TransposeConvolution2dQueueDescriptor> +class ClTransposeConvolution2dWorkload : public ClBaseWorkload<TransposeConvolution2dQueueDescriptor> { public: ClTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClTransposeWorkload.cpp b/src/backends/cl/workloads/ClTransposeWorkload.cpp index d52806b9d4..383f5f1faf 100644 --- a/src/backends/cl/workloads/ClTransposeWorkload.cpp +++ b/src/backends/cl/workloads/ClTransposeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClTransposeWorkloadValidate(const TensorInfo& input, ClTransposeWorkload::ClTransposeWorkload(const TransposeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<TransposeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<TransposeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClTransposeWorkload_Construct", diff --git a/src/backends/cl/workloads/ClTransposeWorkload.hpp b/src/backends/cl/workloads/ClTransposeWorkload.hpp index 8186cac52e..fb4803592f 100644 --- a/src/backends/cl/workloads/ClTransposeWorkload.hpp +++ b/src/backends/cl/workloads/ClTransposeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <armnn/TypesUtils.hpp> @@ -20,7 +20,7 @@ arm_compute::Status ClTransposeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const TransposeDescriptor& descriptor); -class ClTransposeWorkload : public BaseWorkload<TransposeQueueDescriptor> +class ClTransposeWorkload : public ClBaseWorkload<TransposeQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp index 16f6c6156d..ebdd504a97 100644 --- a/src/backends/cl/workloads/ClWorkloadUtils.hpp +++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once |