IVGCVSW-3740 Add Reference Workload support for ABS

 * Implemented RefAbsWorkload and unit tests

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Ibfcdb2b37fd8d240c181f96856e2c997a4b88914

6 files changed, 106 insertions, 0 deletions

diff --git a/src/backends/reference/workloads/Abs.cpp b/src/backends/reference/workloads/Abs.cpp
new file mode 100644
index 0000000000..6a6a79ca56
--- /dev/null
+++ b/src/backends/reference/workloads/Abs.cpp
@@ -0,0 +1,23 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "Abs.hpp"
+
+namespace armnn
+{
+
+void Abs(Decoder<float>& in,
+         Encoder<float>& out,
+         const TensorInfo& tensorInfo)
+{
+    for (unsigned int i = 0u; i < tensorInfo.GetNumElements(); ++i)
+    {
+        out[i];
+        in[i];
+        out.Set(std::abs(in.Get()));
+    }
+}
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/Abs.hpp b/src/backends/reference/workloads/Abs.hpp
new file mode 100644
index 0000000000..b1165d2d93
--- /dev/null
+++ b/src/backends/reference/workloads/Abs.hpp
@@ -0,0 +1,19 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "BaseIterator.hpp"
+#include <armnn/Tensor.hpp>
+#include <armnn/Types.hpp>
+
+namespace armnn
+{
+
+/// Performs the absolute function elementwise
+/// on the inputs to give the outputs.
+void Abs(Decoder<float>& in,
+         Encoder<float>& out,
+         const TensorInfo& tensorInfo);
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/CMakeLists.txt b/src/backends/reference/workloads/CMakeLists.txt
index c9db057be5..7f49e800e5 100644
--- a/src/backends/reference/workloads/CMakeLists.txt
+++ b/src/backends/reference/workloads/CMakeLists.txt
@@ -4,6 +4,8 @@
 #
 
 list(APPEND armnnRefBackendWorkloads_sources
+    Abs.cpp
+    Abs.hpp
     Activation.cpp
     Activation.hpp
     BaseIterator.hpp
@@ -41,6 +43,8 @@ list(APPEND armnnRefBackendWorkloads_sources
     Pooling2d.hpp
     PreluImpl.cpp
     PreluImpl.hpp
+    RefAbsWorkload.cpp
+    RefAbsWorkload.hpp
     RefActivationWorkload.cpp
     RefActivationWorkload.hpp
     RefBatchNormalizationWorkload.cpp
diff --git a/src/backends/reference/workloads/RefAbsWorkload.cpp b/src/backends/reference/workloads/RefAbsWorkload.cpp
new file mode 100644
index 0000000000..5c1f8c0c69
--- /dev/null
+++ b/src/backends/reference/workloads/RefAbsWorkload.cpp
@@ -0,0 +1,37 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "RefAbsWorkload.hpp"
+
+#include "Abs.hpp"
+#include "Decoders.hpp"
+#include "Encoders.hpp"
+#include "RefWorkloadUtils.hpp"
+
+#include <Profiling.hpp>
+
+namespace armnn
+{
+
+void RefAbsWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefAbsWorkload_Execute");
+
+    const TensorInfo& inputTensorInfo = GetTensorInfo(m_Data.m_Inputs[0]);
+
+    std::unique_ptr<Decoder<float>> decoderPtr = MakeDecoder<float>(inputTensorInfo, m_Data.m_Inputs[0]->Map());
+    Decoder<float>& decoder = *decoderPtr;
+
+    const TensorInfo& outputTensorInfo = GetTensorInfo(m_Data.m_Outputs[0]);
+
+    std::unique_ptr<Encoder<float>> encoderPtr = MakeEncoder<float>(outputTensorInfo, m_Data.m_Outputs[0]->Map());
+    Encoder<float>& encoder = *encoderPtr;
+
+    Abs(decoder,
+        encoder,
+        inputTensorInfo);
+}
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefAbsWorkload.hpp b/src/backends/reference/workloads/RefAbsWorkload.hpp
new file mode 100644
index 0000000000..68105556d5
--- /dev/null
+++ b/src/backends/reference/workloads/RefAbsWorkload.hpp
@@ -0,0 +1,21 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <backendsCommon/WorkloadData.hpp>
+
+namespace armnn
+{
+
+class RefAbsWorkload : public BaseWorkload<AbsQueueDescriptor>
+{
+public:
+    using BaseWorkload<AbsQueueDescriptor>::BaseWorkload;
+    virtual void Execute() const override;
+};
+
+} //namespace armnn
diff --git a/src/backends/reference/workloads/RefWorkloads.hpp b/src/backends/reference/workloads/RefWorkloads.hpp
index e86dccd5bf..1ec349ee22 100644
--- a/src/backends/reference/workloads/RefWorkloads.hpp
+++ b/src/backends/reference/workloads/RefWorkloads.hpp
@@ -5,6 +5,7 @@
 
 #pragma once
 
+#include "Abs.hpp"
 #include "Activation.hpp"
 #include "BatchNormImpl.hpp"
 #include "ConvImpl.hpp"
@@ -13,6 +14,7 @@
 #include "FullyConnected.hpp"
 #include "Gather.hpp"
 #include "Pooling2d.hpp"
+#include "RefAbsWorkload.hpp"
 #include "RefActivationWorkload.hpp"
 #include "RefBatchNormalizationWorkload.hpp"
 #include "RefBatchToSpaceNdWorkload.hpp"