IVGCVSW-5843 Separate memory managers for WorkingMemHandles

 * Add inter layer memory management to WorkingMemHandle
 * Change Const layers to be executed once in loadedNetworkConstruction
   and share tensorHandle between all WorkingMemHandles
 * Fix various reference workloads pointing to memory in the queueDescriptor

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I69d4b3c5c84d2f5abe4540c3e624ab4f00d88226

1 files changed, 5 insertions, 1 deletions

diff --git a/src/backends/reference/workloads/RefPreluWorkload.cpp b/src/backends/reference/workloads/RefPreluWorkload.cpp
index b298874334..c1d8de2d01 100644
--- a/src/backends/reference/workloads/RefPreluWorkload.cpp
+++ b/src/backends/reference/workloads/RefPreluWorkload.cpp
@@ -32,6 +32,10 @@ void RefPreluWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<I
 {
     ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefPreluWorkload_Execute");
 
+    const TensorInfo& inputInfo  = GetTensorInfo(inputs[0]);
+    const TensorInfo& alphaInfo  = GetTensorInfo(inputs[1]);
+    const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
+
     std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]),
                                                                       inputs[0]->Map());
     std::unique_ptr<Decoder<float>> alphaDecoder = MakeDecoder<float>(GetTensorInfo(inputs[1]),
@@ -39,7 +43,7 @@ void RefPreluWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<I
     std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]),
                                                                        outputs[0]->Map());
 
-    PreluImpl(m_Data, *inputDecoder, *alphaDecoder, *outputEncoder);
+    PreluImpl(inputInfo, alphaInfo, outputInfo, *inputDecoder, *alphaDecoder, *outputEncoder);
 }
 
 } // namespace armnn