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author | narpra01 <narumol.prangnawarat@arm.com> | 2018-09-28 11:07:51 +0100 |
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committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-10-10 16:16:57 +0100 |
commit | 1e4c31dafb1c8984a126fa1d211ed8f9eedaf7cc (patch) | |
tree | 006e40b3bbfdc4a202cdada8fa9afec0dd8fffae /src/backends/reference/workloads/RefMeanFloat32Workload.cpp | |
parent | 33cea4db0b2729c5dbd50f9c0985578c60baffdd (diff) | |
download | armnn-1e4c31dafb1c8984a126fa1d211ed8f9eedaf7cc.tar.gz |
IVGCVSW-1812 Adding Ref implementation and tests of MeanWorkloads
Change-Id: I6fb15c407024e3b91d5abf4513f8090be5821760
Diffstat (limited to 'src/backends/reference/workloads/RefMeanFloat32Workload.cpp')
-rw-r--r-- | src/backends/reference/workloads/RefMeanFloat32Workload.cpp | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/RefMeanFloat32Workload.cpp b/src/backends/reference/workloads/RefMeanFloat32Workload.cpp new file mode 100644 index 0000000000..a23906b8aa --- /dev/null +++ b/src/backends/reference/workloads/RefMeanFloat32Workload.cpp @@ -0,0 +1,35 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "RefMeanFloat32Workload.hpp" + +#include "Mean.hpp" +#include "RefWorkloadUtils.hpp" + +#include "Profiling.hpp" +#include "vector" + +namespace armnn +{ + +RefMeanFloat32Workload::RefMeanFloat32Workload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info) + :Float32Workload<MeanQueueDescriptor>(descriptor, info) {} + + +void RefMeanFloat32Workload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefMeanFloat32Workload_Execute"); + + const TensorInfo& inputInfo = GetTensorInfo(m_Data.m_Inputs[0]); + const TensorInfo& outputInfo = GetTensorInfo(m_Data.m_Outputs[0]); + const float* inputData = GetInputTensorDataFloat(0, m_Data); + float* outputData = GetOutputTensorDataFloat(0, m_Data); + + Mean(inputInfo, outputInfo, m_Data.m_Parameters.m_Axis, inputData, outputData); +} + +} //namespace armnn + + |