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author | Mike Kelly <mike.kelly@arm.com> | 2019-05-22 17:21:49 +0100 |
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committer | Ruomei Yan <ruomei.yan@arm.com> | 2019-05-23 09:23:19 +0000 |
commit | 9b3983299f882c8d84c5abd0d40ca75a801ea7f2 (patch) | |
tree | 40866201c7a65b5c4d10034b5f03a35070cc961f /src/backends/reference/workloads/RefConvolution2dWorkload.cpp | |
parent | 31b2e134c392617de7a41c56d460ac494eab0140 (diff) | |
download | armnn-9b3983299f882c8d84c5abd0d40ca75a801ea7f2.tar.gz |
IVGCVSW-3025: Refactor reference Convolution2d workload
* Refactored RefConvolution2dWorkload to support all DataTypes through Encoders and Decoders.
* Added Convolute function to ConvImpl that uses Encoders and Decoders to support all DataTypes.
* Deleted RefConvolution2dFloat32Workload and RefConvolution2dUint8Workload.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic5ef0f499d08b948fa65fdee54b5f681fd0b1c05
Diffstat (limited to 'src/backends/reference/workloads/RefConvolution2dWorkload.cpp')
-rw-r--r-- | src/backends/reference/workloads/RefConvolution2dWorkload.cpp | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/RefConvolution2dWorkload.cpp b/src/backends/reference/workloads/RefConvolution2dWorkload.cpp new file mode 100644 index 0000000000..0824d5cf1c --- /dev/null +++ b/src/backends/reference/workloads/RefConvolution2dWorkload.cpp @@ -0,0 +1,53 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "RefConvolution2dWorkload.hpp" + +#include "ConvImpl.hpp" +#include "RefWorkloadUtils.hpp" + +#include "Profiling.hpp" + +namespace armnn +{ +RefConvolution2dWorkload::RefConvolution2dWorkload( + const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) + : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) +{ + m_Weight = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Weight)); + const TensorInfo& rFilterInfo = GetTensorInfo(m_Weight.get()); + m_FilterShape = rFilterInfo.GetShape(); + m_FilterDecoder = MakeDecoder<float>(rFilterInfo, m_Weight.get()->Map(true)); + + if (descriptor.m_Parameters.m_BiasEnabled) + { + m_Bias = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Bias)); + const TensorInfo& biasInfo = GetTensorInfo(m_Bias.get()); + m_BiasDecoder = MakeDecoder<float>(biasInfo, m_Bias.get()->Map(true)); + } +} + +void RefConvolution2dWorkload::PostAllocationConfigure() +{ + const TensorInfo& inputInfo = GetTensorInfo(m_Data.m_Inputs[0]); + m_InputShape = inputInfo.GetShape(); + m_InputDecoder = MakeDecoder<float>(inputInfo, m_Data.m_Inputs[0]->Map()); + + const TensorInfo& outputInfo = GetTensorInfo(m_Data.m_Outputs[0]); + m_OutputShape = outputInfo.GetShape(); + m_OutputEncoder = MakeEncoder<float>(outputInfo, m_Data.m_Outputs[0]->Map()); +} + +void RefConvolution2dWorkload::Execute() const { + ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConvolution2dWorkload_Execute"); + + Convolve(m_InputShape, *m_InputDecoder, m_OutputShape, *m_OutputEncoder, m_FilterShape, + *m_FilterDecoder, m_Data.m_Parameters.m_BiasEnabled, m_BiasDecoder.get(), + m_Data.m_Parameters.m_DataLayout, m_Data.m_Parameters.m_PadTop, m_Data.m_Parameters.m_PadLeft, + m_Data.m_Parameters.m_StrideX, m_Data.m_Parameters.m_StrideY, + m_Data.m_Parameters.m_DilationX, m_Data.m_Parameters.m_DilationY); +} + +} //namespace armnn |