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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-03-13 10:26:05 +0000 |
|---|---|---|
| committer | Jim Flynn <jim.flynn@arm.com> | 2020-03-17 20:56:46 +0000 |
| commit | 7ddbbae7ad3e0000d8e6a76458cac68254dc8048 (patch) | |
| tree | 43f6240df090b084528034358982e8f09706ef95 /src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp | |
| parent | f4a953f75b751452ae9303abc8565d310c55bfff (diff) | |
| download | armnn-7ddbbae7ad3e0000d8e6a76458cac68254dc8048.tar.gz | |
IVGCVSW-4515 Add ConvertBf16ToFp32Layer and Ref workload support
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ida6d7e1d2c9abe0618f8b711bab9d62c011090d6
Diffstat (limited to 'src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp')
| -rw-r--r-- | src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp new file mode 100644 index 0000000000..c4b5416836 --- /dev/null +++ b/src/backends/reference/workloads/RefConvertBf16ToFp32Workload.cpp @@ -0,0 +1,27 @@ +// +// Copyright © 2020 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "RefConvertBf16ToFp32Workload.hpp" +#include "RefWorkloadUtils.hpp" + +#include <armnnUtils/FloatingPointConverter.hpp> + +#include <BFloat16.hpp> + +namespace armnn +{ + +void RefConvertBf16ToFp32Workload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConvertBf16ToFp32Workload_Execute"); + + const BFloat16* const input = GetInputTensorDataBFloat16(0, m_Data); + float* const output = GetOutputTensorDataFloat(0, m_Data); + + unsigned int numElements = GetTensorInfo(m_Data.m_Inputs[0]).GetNumElements(); + armnnUtils::FloatingPointConverter::ConvertBFloat16ToFloat32(input, numElements, output); +} + +} //namespace armnn |