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| author | Sadik Armagan <sadik.armagan@arm.com> | 2020-04-17 12:45:14 +0100 |
|---|---|---|
| committer | TeresaARM <teresa.charlinreyes@arm.com> | 2020-04-27 14:49:42 +0000 |
| commit | 303980c502c721f13d65e7087be6c0758df65044 (patch) | |
| tree | f1a9ab898b3121b988b8328161eddeb6a608e73f /src/backends/reference/workloads/Pad.cpp | |
| parent | 49c52a1e3be742cd7785ccc36c31cbbe495c4003 (diff) | |
| download | armnn-303980c502c721f13d65e7087be6c0758df65044.tar.gz | |
IVGCVSW-4668 Add TENSOR_QUANT8_ASYMM_SIGNED data type support to CpuRef operators
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I094125ba80699cc3cf5226bda6662a54e6caa988
Diffstat (limited to 'src/backends/reference/workloads/Pad.cpp')
| -rw-r--r-- | src/backends/reference/workloads/Pad.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/Pad.cpp b/src/backends/reference/workloads/Pad.cpp index ffdd469609..1b634145fc 100644 --- a/src/backends/reference/workloads/Pad.cpp +++ b/src/backends/reference/workloads/Pad.cpp @@ -177,6 +177,12 @@ template void Pad<uint8_t>(const TensorInfo& inputInfo, const uint8_t* inputData, uint8_t* outData, const float padValue); +template void Pad<int8_t>(const TensorInfo& inputInfo, + const TensorInfo& outputInfo, + std::vector<std::pair<unsigned int, unsigned int>> m_PadList, + const int8_t* inputData, + int8_t* outData, + const float padValue); template void Pad<int16_t>(const TensorInfo& inputInfo, const TensorInfo& outputInfo, std::vector<std::pair<unsigned int, unsigned int>> m_PadList, |