IVGCVSW-6088 Add Sin and Log to ElementWiseUnary

* Ref workload
* Cl workload
* Neon workload
* Serializer
* Deserializer

* Remove boost include from TensorTest.cpp

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf

6 files changed, 144 insertions, 0 deletions

diff --git a/src/backends/neon/workloads/CMakeLists.txt b/src/backends/neon/workloads/CMakeLists.txt
index f8fc18fdda..d08dd7e704 100644
--- a/src/backends/neon/workloads/CMakeLists.txt
+++ b/src/backends/neon/workloads/CMakeLists.txt
@@ -56,6 +56,8 @@ list(APPEND armnnNeonBackendWorkloads_sources
     NeonInstanceNormalizationWorkload.hpp
     NeonL2NormalizationFloatWorkload.cpp
     NeonL2NormalizationFloatWorkload.hpp
+    NeonLogWorkload.cpp
+    NeonLogWorkload.hpp
     NeonLogicalAndWorkload.cpp
     NeonLogicalAndWorkload.hpp
     NeonLogicalNotWorkload.cpp
@@ -103,6 +105,8 @@ list(APPEND armnnNeonBackendWorkloads_sources
     NeonResizeWorkload.hpp
     NeonRsqrtWorkload.cpp
     NeonRsqrtWorkload.hpp
+    NeonSinWorkload.cpp
+    NeonSinWorkload.hpp
     NeonSliceWorkload.cpp
     NeonSliceWorkload.hpp
     NeonSoftmaxWorkload.cpp
diff --git a/src/backends/neon/workloads/NeonLogWorkload.cpp b/src/backends/neon/workloads/NeonLogWorkload.cpp
new file mode 100644
index 0000000000..460f5b3b09
--- /dev/null
+++ b/src/backends/neon/workloads/NeonLogWorkload.cpp
@@ -0,0 +1,42 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "NeonLogWorkload.hpp"
+
+#include "NeonWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorHandle.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status NeonLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::NELogLayer::validate(&aclInput, &aclOutput);
+}
+
+NeonLogWorkload::NeonLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info)
+    : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("NeonLogWorkload", 1, 1);
+
+    arm_compute::ITensor& input  = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_LogLayer.configure(&input, &output);
+}
+
+void NeonLogWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonLogWorkload_Execute");
+    m_LogLayer.run();
+}
+
+} // namespace armnn
diff --git a/src/backends/neon/workloads/NeonLogWorkload.hpp b/src/backends/neon/workloads/NeonLogWorkload.hpp
new file mode 100644
index 0000000000..965a845ea8
--- /dev/null
+++ b/src/backends/neon/workloads/NeonLogWorkload.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status NeonLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class NeonLogWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor>
+{
+public:
+    NeonLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::NELogLayer m_LogLayer;
+};
+
+} //namespace armnn
\ No newline at end of file
diff --git a/src/backends/neon/workloads/NeonSinWorkload.cpp b/src/backends/neon/workloads/NeonSinWorkload.cpp
new file mode 100644
index 0000000000..ac2bd4965a
--- /dev/null
+++ b/src/backends/neon/workloads/NeonSinWorkload.cpp
@@ -0,0 +1,42 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "NeonSinWorkload.hpp"
+
+#include "NeonWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorHandle.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status NeonSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::NESinLayer::validate(&aclInput, &aclOutput);
+}
+
+NeonSinWorkload::NeonSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info)
+    : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("NeonSinWorkload", 1, 1);
+
+    arm_compute::ITensor& input  = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_SinLayer.configure(&input, &output);
+}
+
+void NeonSinWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonSinWorkload_Execute");
+    m_SinLayer.run();
+}
+
+} // namespace armnn
\ No newline at end of file
diff --git a/src/backends/neon/workloads/NeonSinWorkload.hpp b/src/backends/neon/workloads/NeonSinWorkload.hpp
new file mode 100644
index 0000000000..9405c3c734
--- /dev/null
+++ b/src/backends/neon/workloads/NeonSinWorkload.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status NeonSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class NeonSinWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor>
+{
+public:
+    NeonSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::NESinLayer m_SinLayer;
+};
+
+} //namespace armnn
\ No newline at end of file
diff --git a/src/backends/neon/workloads/NeonWorkloads.hpp b/src/backends/neon/workloads/NeonWorkloads.hpp
index 16035e02cd..2fb4b17eff 100644
--- a/src/backends/neon/workloads/NeonWorkloads.hpp
+++ b/src/backends/neon/workloads/NeonWorkloads.hpp
@@ -31,6 +31,7 @@
 #include "NeonGatherWorkload.hpp"
 #include "NeonInstanceNormalizationWorkload.hpp"
 #include "NeonL2NormalizationFloatWorkload.hpp"
+#include "NeonLogWorkload.hpp"
 #include "NeonLogicalAndWorkload.hpp"
 #include "NeonLogicalNotWorkload.hpp"
 #include "NeonLogicalOrWorkload.hpp"
@@ -54,6 +55,7 @@
 #include "NeonReshapeWorkload.hpp"
 #include "NeonResizeWorkload.hpp"
 #include "NeonRsqrtWorkload.hpp"
+#include "NeonSinWorkload.hpp"
 #include "NeonSliceWorkload.hpp"
 #include "NeonSoftmaxWorkload.hpp"
 #include "NeonSpaceToBatchNdWorkload.hpp"