IVGCVSW-5419 'Add ACL Support for CAST Operator'

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I481343af311cf3cbc81eee80e80d8b5581fdfd7b

4 files changed, 75 insertions, 0 deletions

diff --git a/src/backends/neon/workloads/CMakeLists.txt b/src/backends/neon/workloads/CMakeLists.txt
index 7c2b185ec3..f8fc18fdda 100644
--- a/src/backends/neon/workloads/CMakeLists.txt
+++ b/src/backends/neon/workloads/CMakeLists.txt
@@ -16,6 +16,8 @@ list(APPEND armnnNeonBackendWorkloads_sources
     NeonBatchNormalizationWorkload.hpp
     NeonBatchToSpaceNdWorkload.cpp
     NeonBatchToSpaceNdWorkload.hpp
+    NeonCastWorkload.cpp
+    NeonCastWorkload.hpp
     NeonComparisonWorkload.cpp
     NeonComparisonWorkload.hpp
     NeonConcatWorkload.cpp
diff --git a/src/backends/neon/workloads/NeonCastWorkload.cpp b/src/backends/neon/workloads/NeonCastWorkload.cpp
new file mode 100644
index 0000000000..4727fe127e
--- /dev/null
+++ b/src/backends/neon/workloads/NeonCastWorkload.cpp
@@ -0,0 +1,44 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "NeonCastWorkload.hpp"
+#include "NeonWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorHandle.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+namespace armnn
+{
+
+static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::ConvertPolicy::SATURATE;
+
+arm_compute::Status NeonCastValidate(const TensorInfo& input, const TensorInfo& output)
+{
+    arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::NECast::validate(&aclInput, &aclOutput, g_AclConvertPolicy);
+}
+
+NeonCastWorkload::NeonCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info)
+    : BaseWorkload<CastQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("NeonCastWorkload", 1, 1);
+
+    arm_compute::ITensor& input  = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_CastLayer.configure(&input, &output, g_AclConvertPolicy);
+}
+
+void NeonCastWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonCastWorkload_Execute");
+    m_CastLayer.run();
+}
+
+} // namespace armnn
diff --git a/src/backends/neon/workloads/NeonCastWorkload.hpp b/src/backends/neon/workloads/NeonCastWorkload.hpp
new file mode 100644
index 0000000000..4247c2e712
--- /dev/null
+++ b/src/backends/neon/workloads/NeonCastWorkload.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/NEON/functions/NECast.h>
+
+namespace armnn
+{
+
+arm_compute::Status NeonCastValidate(const TensorInfo& input, const TensorInfo& output);
+
+class NeonCastWorkload : public BaseWorkload<CastQueueDescriptor>
+{
+public:
+    NeonCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::NECast m_CastLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/neon/workloads/NeonWorkloads.hpp b/src/backends/neon/workloads/NeonWorkloads.hpp
index 4eb526a04d..16035e02cd 100644
--- a/src/backends/neon/workloads/NeonWorkloads.hpp
+++ b/src/backends/neon/workloads/NeonWorkloads.hpp
@@ -10,6 +10,7 @@
 #include "NeonArgMinMaxWorkload.hpp"
 #include "NeonBatchNormalizationWorkload.hpp"
 #include "NeonBatchToSpaceNdWorkload.hpp"
+#include "NeonCastWorkload.hpp"
 #include "NeonComparisonWorkload.hpp"
 #include "NeonConcatWorkload.hpp"
 #include "NeonConstantWorkload.hpp"