MLCE-156: Add Division workload in CpuAcc

Change-Id: I1f228fcaf1077867d9755a2b850c6703387fab34
Signed-off-by: Pablo Tello <pablo.tello@arm.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/src/backends/neon/workloads/NeonDivisionWorkload.hpp b/src/backends/neon/workloads/NeonDivisionWorkload.hpp
new file mode 100644
index 0000000000..2405d9a4ab
--- /dev/null
+++ b/src/backends/neon/workloads/NeonDivisionWorkload.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2020 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <neon/workloads/NeonWorkloadUtils.hpp>
+
+#include <arm_compute/runtime/NEON/functions/NEElementwiseOperations.h>
+
+namespace armnn
+{
+
+arm_compute::Status NeonDivisionWorkloadValidate(const TensorInfo& input0,
+                                                const TensorInfo& input1,
+                                                const TensorInfo& output);
+
+class NeonDivisionWorkload : public BaseWorkload<DivisionQueueDescriptor>
+{
+public:
+    NeonDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info);
+
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::NEElementwiseDivision m_DivLayer;
+};
+
+} //namespace armnn