diff options
author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2024-02-08 18:46:38 +0000 |
---|---|---|
committer | David Monahan <david.monahan@arm.com> | 2024-02-08 20:32:12 +0000 |
commit | 5bda97349eb99151a61ab787a33e9c224ca215be (patch) | |
tree | 1120735b62fdee950f0e07f2ba0c3d08963ed849 /src/backends/gpuFsa/layers | |
parent | 20dda37357ac0d02550f4421de6c8bfe44304f90 (diff) | |
download | armnn-5bda97349eb99151a61ab787a33e9c224ca215be.tar.gz |
IVGCVSW-8276 GpuFsa Op: Add MatMul
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib95eb0fd71106e684cb7652917b8de9f0ac73f9c
Diffstat (limited to 'src/backends/gpuFsa/layers')
-rw-r--r-- | src/backends/gpuFsa/layers/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/backends/gpuFsa/layers/GpuFsaBatchMatMul.cpp | 106 | ||||
-rw-r--r-- | src/backends/gpuFsa/layers/GpuFsaBatchMatMul.hpp | 22 |
3 files changed, 130 insertions, 0 deletions
diff --git a/src/backends/gpuFsa/layers/CMakeLists.txt b/src/backends/gpuFsa/layers/CMakeLists.txt index 3fe4bdcbc6..37d52e4da1 100644 --- a/src/backends/gpuFsa/layers/CMakeLists.txt +++ b/src/backends/gpuFsa/layers/CMakeLists.txt @@ -4,6 +4,8 @@ # list(APPEND armnnGpuFsaBackendLayers_sources + GpuFsaBatchMatMul.cpp + GpuFsaBatchMatMul.hpp GpuFsaCast.cpp GpuFsaCast.hpp GpuFsaConvolution2d.cpp diff --git a/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.cpp b/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.cpp new file mode 100644 index 0000000000..99c899946f --- /dev/null +++ b/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.cpp @@ -0,0 +1,106 @@ +// +// Copyright © 2024 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "GpuFsaBatchMatMul.hpp" +#include "UtilsGpuFsa.hpp" + +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h> +#include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h> +#include <arm_compute/dynamic_fusion/sketch/gpu/operators/GpuMatMul.h> +#include <arm_compute/dynamic_fusion/sketch/gpu/operators/GpuOutput.h> + +using namespace arm_compute::experimental::dynamic_fusion; +using namespace armnn::armcomputetensorutils; + +namespace armnn +{ + +arm_compute::Status GpuFsaBatchMatMulValidate(const TensorInfo& input0, + const TensorInfo& input1, + const BatchMatMulDescriptor& descriptor) +{ + // Create a new workload sketch, for validation purposes + auto compileCtx = arm_compute::CLKernelLibrary::get().get_compile_context(); + auto workloadContext = GpuWorkloadContext(&compileCtx); + GpuWorkloadSketch sketch{ &workloadContext }; + + arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0, input0.GetNumDimensions()); + arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1, input1.GetNumDimensions()); + + aclInput0Info.set_are_values_constant(input0.IsConstant()); + aclInput1Info.set_are_values_constant(input1.IsConstant()); + + arm_compute::ITensorInfo* inputInfo0 = workloadContext.create_tensor_info(aclInput0Info); + arm_compute::ITensorInfo* inputInfo1 = workloadContext.create_tensor_info(aclInput1Info); + + MatMulAttributes matMulAttributes{}; + matMulAttributes.adj_lhs(descriptor.m_TransposeX); + matMulAttributes.adj_rhs(descriptor.m_TransposeY); + GpuMatMulSettings matmulSettings{}; + matmulSettings.m0(1); + matmulSettings.n0(1); + matmulSettings.k0(1); + + return GpuMatMul::validate_op(sketch, inputInfo0, inputInfo1, matMulAttributes, matmulSettings); +} + +void GpuFsaBatchMatMulCreateOp(GpuFsaPreCompiledBlob* blob, + const TensorInfo& input0, + const TensorInfo& input1, + const BatchMatMulDescriptor& descriptor) +{ + GpuWorkloadSketch* sketch = blob->sketch.get(); + GpuWorkloadContext* workloadContext = blob->workloadContext.get(); + std::vector<arm_compute::ITensorInfo*> inputTensorInfos = {}; + std::vector<arm_compute::ITensorInfo*> outputTensorInfos = {}; + + arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0, input0.GetNumDimensions()); + arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1, input1.GetNumDimensions()); + + aclInput0Info.set_are_values_constant(input0.IsConstant()); + aclInput1Info.set_are_values_constant(input1.IsConstant()); + + inputTensorInfos.emplace_back(workloadContext->create_tensor_info(aclInput0Info)); + inputTensorInfos.emplace_back(workloadContext->create_tensor_info(aclInput1Info)); + + MatMulAttributes matMulAttributes{}; + matMulAttributes.adj_lhs(descriptor.m_TransposeX); + matMulAttributes.adj_rhs(descriptor.m_TransposeY); + GpuMatMulSettings matmulSettings{}; + matmulSettings.m0(1); + matmulSettings.n0(1); + matmulSettings.k0(1); + + // Validate operator, check status and update reasonIfUnsupported + arm_compute::Status aclStatus = GpuMatMul::validate_op(*sketch, + inputTensorInfos[0], + inputTensorInfos[1], + matMulAttributes, + matmulSettings); + + const bool supported = aclStatus.error_code() == arm_compute::ErrorCode::OK; + if (!supported) + { + throw BackendCapabilityException("\"GpuFsa\" backend failed during elementwise binary add validation"); + } + + arm_compute::ITensorInfo* addOutputInfo = GpuMatMul::create_op(*sketch, + inputTensorInfos[0], + inputTensorInfos[1], + matMulAttributes, + matmulSettings); + + // Temporary fix until fusing attempt is make for GpuFsa backend and Output layer workload is created. + outputTensorInfos.emplace_back(workloadContext->create_tensor_info()); + GpuOutput::create_op(*sketch, addOutputInfo, outputTensorInfos[0]); + + // Store the TensorInfos within the blob as unique_ptrs to be used later + blob->inputTensorInfos = std::make_unique<std::vector<arm_compute::ITensorInfo*>>(inputTensorInfos); + blob->outputTensorInfos = std::make_unique<std::vector<arm_compute::ITensorInfo*>>(outputTensorInfos); +} + +} // namespace armnn
\ No newline at end of file diff --git a/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.hpp b/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.hpp new file mode 100644 index 0000000000..f7af3a763c --- /dev/null +++ b/src/backends/gpuFsa/layers/GpuFsaBatchMatMul.hpp @@ -0,0 +1,22 @@ +// +// Copyright © 2024 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// +#pragma once + +#include <armnn/Descriptors.hpp> + +#include <gpuFsa/GpuFsaBackend.hpp> + +namespace armnn +{ +arm_compute::Status GpuFsaBatchMatMulValidate(const TensorInfo& input0, + const TensorInfo& input1, + const BatchMatMulDescriptor& descriptor); + +void GpuFsaBatchMatMulCreateOp(GpuFsaPreCompiledBlob* blob, + const TensorInfo& input0, + const TensorInfo& input1, + const BatchMatMulDescriptor& descriptor); + +} // namespace armnn
\ No newline at end of file |