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authorTianle Cheng <tianle.cheng@arm.com>2024-01-23 11:21:48 +0000
committerTianle Cheng <tianle.cheng@arm.com>2024-01-26 12:04:20 +0000
commitfbfa49eeb14c6cb94d47e3c770b0c168e818cf79 (patch)
treeffed1cc91800aeb00ed22bd9cd3be9d8072440fd /src/backends/gpuFsa/layers/GpuFsaDepthwiseConvolution2d.hpp
parent14b27a299ee091b3a6d29603f0f49a077a39f457 (diff)
downloadarmnn-fbfa49eeb14c6cb94d47e3c770b0c168e818cf79.tar.gz
IVGCVSW-7571 GpuFsa Op: Add Depthwise Conv2d
* Added DepthwiseConv2d support for GpuFsa backend. * Updated DepthwiseConv2d End-to-End test Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646839980d138ae235a00990c97c6e66a4418a5e
Diffstat (limited to 'src/backends/gpuFsa/layers/GpuFsaDepthwiseConvolution2d.hpp')
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diff --git a/src/backends/gpuFsa/layers/GpuFsaDepthwiseConvolution2d.hpp b/src/backends/gpuFsa/layers/GpuFsaDepthwiseConvolution2d.hpp
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+++ b/src/backends/gpuFsa/layers/GpuFsaDepthwiseConvolution2d.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2024 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include <armnn/Descriptors.hpp>
+#include <armnn/Tensor.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h>
+#include <gpuFsa/GpuFsaBackend.hpp>
+
+namespace armnn
+{
+
+using namespace arm_compute::experimental::dynamic_fusion;
+
+arm_compute::Status GpuFsaDepthwiseConvolution2dValidate(const TensorInfo& input,
+ const DepthwiseConvolution2dDescriptor& descriptor,
+ const TensorInfo& weights,
+ const Optional<TensorInfo>& biases);
+
+void GpuFsaDepthwiseConvolution2dCreateOp(GpuFsaPreCompiledBlob* blob,
+ const TensorInfo& input,
+ const DepthwiseConvolution2dDescriptor& descriptor,
+ const TensorInfo& weights,
+ const Optional<TensorInfo>& biases);
+
+} // namespace armnn