diff options
author | Cathal Corbett <cathal.corbett@arm.com> | 2023-01-11 13:03:21 +0000 |
---|---|---|
committer | Cathal Corbett <cathal.corbett@arm.com> | 2023-01-11 16:39:24 +0000 |
commit | d9e55f05847792edbbf6a8c2c4d3901d37f63d1f (patch) | |
tree | dc090a997991ef97dfc976eea24cfba1f732ea68 /src/backends/cl | |
parent | 9c843c3e99a8cb1951399171ceddb01c43924fa2 (diff) | |
download | armnn-d9e55f05847792edbbf6a8c2c4d3901d37f63d1f.tar.gz |
Move tuning and IClTensorHandle code from cl to aclCommon backend.
* Required to enable easier future merging and rebase into experimental/GpuFsa
as part of IVGCVSW-7380.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I066dcf00523ff430a0908666e452548ab848bd86
Diffstat (limited to 'src/backends/cl')
-rw-r--r-- | src/backends/cl/CMakeLists.txt | 3 | ||||
-rw-r--r-- | src/backends/cl/ClBackendContext.cpp | 86 | ||||
-rw-r--r-- | src/backends/cl/ClContextControl.cpp | 53 | ||||
-rw-r--r-- | src/backends/cl/ClContextControl.hpp | 22 | ||||
-rw-r--r-- | src/backends/cl/ClImportTensorHandle.hpp | 4 | ||||
-rw-r--r-- | src/backends/cl/ClTensorHandle.hpp | 4 | ||||
-rw-r--r-- | src/backends/cl/IClTensorHandle.hpp | 22 | ||||
-rw-r--r-- | src/backends/cl/test/CMakeLists.txt | 4 | ||||
-rw-r--r-- | src/backends/cl/test/ClDefaultAllocatorTests.cpp (renamed from src/backends/cl/test/DefaultAllocatorTests.cpp) | 2 |
9 files changed, 15 insertions, 185 deletions
diff --git a/src/backends/cl/CMakeLists.txt b/src/backends/cl/CMakeLists.txt index aeb90b069c..20c42061fc 100644 --- a/src/backends/cl/CMakeLists.txt +++ b/src/backends/cl/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright © 2017 Arm Ltd. All rights reserved. +# Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved. # SPDX-License-Identifier: MIT # @@ -44,7 +44,6 @@ if(ARMCOMPUTECL) ClTensorHandleFactory.hpp ClWorkloadFactory.cpp ClWorkloadFactory.hpp - IClTensorHandle.hpp ICLTensorProxy.hpp OpenClTimer.cpp OpenClTimer.hpp diff --git a/src/backends/cl/ClBackendContext.cpp b/src/backends/cl/ClBackendContext.cpp index c63fb0c893..adee2763ba 100644 --- a/src/backends/cl/ClBackendContext.cpp +++ b/src/backends/cl/ClBackendContext.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -59,84 +59,6 @@ struct ClBackendContext::ClContextControlWrapper ClContextControl m_ClContextControl; }; -std::string LowerString(std::string value) -{ - std::transform(value.begin(), value.end(), value.begin(), - [](unsigned char c){ return std::tolower(c); }); - - return value; -} - -enum class TuningLevel -{ - None, - Rapid, - Normal, - Exhaustive -}; - - -TuningLevel ParseTuningLevel(const BackendOptions::Var& value, TuningLevel defaultValue) -{ - if (value.IsInt()) - { - int v = value.AsInt(); - if (v > static_cast<int>(TuningLevel::Exhaustive) || - v < static_cast<int>(TuningLevel::None)) - { - ARMNN_LOG(warning) << "Invalid GpuAcc tuning level ("<< v << ") selected. " - "Using default(" << static_cast<int>(defaultValue) << ")"; - } else - { - return static_cast<TuningLevel>(v); - } - } - return defaultValue; -} - -bool ParseBoolean(const BackendOptions::Var& value, bool defaultValue) -{ - if (value.IsBool()) - { - return value.AsBool(); - } - return defaultValue; -} - -std::string ParseFile(const BackendOptions::Var& value, std::string defaultValue) -{ - if (value.IsString()) - { - return value.AsString(); - } - return defaultValue; -} - -void ConfigureTuner(arm_compute::CLTuner &tuner, TuningLevel level) -{ - tuner.set_tune_new_kernels(true); // Turn on tuning initially. - - switch (level) - { - case TuningLevel::Rapid: - ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Rapid (1)"; - tuner.set_tuner_mode(arm_compute::CLTunerMode::RAPID); - break; - case TuningLevel::Normal: - ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Normal (2)"; - tuner.set_tuner_mode(arm_compute::CLTunerMode::NORMAL); - break; - case TuningLevel::Exhaustive: - ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Exhaustive (3)"; - tuner.set_tuner_mode(arm_compute::CLTunerMode::EXHAUSTIVE); - break; - case TuningLevel::None: - default: - tuner.set_tune_new_kernels(false); // Turn off tuning. Set to "use" only mode. - break; - } -} - ClBackendContext::ClBackendContext(const IRuntime::CreationOptions& options) : IBackendContext(options) , m_TuningFile() @@ -191,17 +113,17 @@ ClBackendContext::ClBackendContext(const IRuntime::CreationOptions& options) { if (name == "KernelProfilingEnabled") { - kernelProfiling |= ParseBoolean(value, false); + kernelProfiling |= ParseBooleanBackendOption(value, false); } else if (name == "TuningFile") { - m_TuningFile = ParseFile(value, ""); + m_TuningFile = ParseStringBackendOption(value, ""); } else if (name == "TuningLevel") { tuningLevel = ParseTuningLevel(value, defaultTuningLevel); } else if (name == "MLGOTuningFilePath") { - m_MLGOTuningFile = ParseFile(value, ""); + m_MLGOTuningFile = ParseStringBackendOption(value, ""); } }); diff --git a/src/backends/cl/ClContextControl.cpp b/src/backends/cl/ClContextControl.cpp index fd2d0f53eb..34eca961b4 100644 --- a/src/backends/cl/ClContextControl.cpp +++ b/src/backends/cl/ClContextControl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -166,55 +166,4 @@ void ClContextControl::ClearClCache() DoLoadOpenClRuntime(true); } -armnn::IGpuAccTunedParameters* IGpuAccTunedParameters::CreateRaw(armnn::IGpuAccTunedParameters::Mode mode, - armnn::IGpuAccTunedParameters::TuningLevel tuningLevel) -{ - return new ClTunedParameters(mode, tuningLevel); -} - -armnn::IGpuAccTunedParametersPtr IGpuAccTunedParameters::Create(armnn::IGpuAccTunedParameters::Mode mode, - armnn::IGpuAccTunedParameters::TuningLevel tuningLevel) -{ - return IGpuAccTunedParametersPtr(CreateRaw(mode, tuningLevel), &IGpuAccTunedParameters::Destroy); -} - -void IGpuAccTunedParameters::Destroy(IGpuAccTunedParameters* params) -{ - delete params; -} - -ClTunedParameters::ClTunedParameters(armnn::IGpuAccTunedParameters::Mode mode, - armnn::IGpuAccTunedParameters::TuningLevel tuningLevel) - : m_Mode(mode) - , m_TuningLevel(tuningLevel) - , m_Tuner(mode == ClTunedParameters::Mode::UpdateTunedParameters) -{ -} - -void ClTunedParameters::Load(const char* filename) -{ - try - { - m_Tuner.load_from_file(filename); - } - catch (const std::exception& e) - { - throw armnn::Exception(std::string("Failed to load tuned parameters file '") + filename + "': " + - e.what()); - } -} - -void ClTunedParameters::Save(const char* filename) const -{ - try - { - m_Tuner.save_to_file(filename); - } - catch (const std::exception& e) - { - throw armnn::Exception(std::string("Failed to save tuned parameters file to '") + filename + "': " + - e.what()); - } -} - } // namespace armnn diff --git a/src/backends/cl/ClContextControl.hpp b/src/backends/cl/ClContextControl.hpp index 4a640cdf22..7520d102a5 100644 --- a/src/backends/cl/ClContextControl.hpp +++ b/src/backends/cl/ClContextControl.hpp @@ -1,13 +1,10 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include "armnn/IRuntime.hpp" - -#include <arm_compute/runtime/CL/CLTuner.h> -#include <arm_compute/runtime/CL/CLGEMMHeuristicsHandle.h> +#include <aclCommon/ArmComputeTuningUtils.hpp> namespace armnn { @@ -42,19 +39,4 @@ private: bool m_ProfilingEnabled; }; -class ClTunedParameters : public IGpuAccTunedParameters -{ -public: - ClTunedParameters(armnn::IGpuAccTunedParameters::Mode mode, armnn::IGpuAccTunedParameters::TuningLevel tuningLevel); - - virtual void Load(const char* filename); - virtual void Save(const char* filename) const; - - Mode m_Mode; - TuningLevel m_TuningLevel; - - arm_compute::CLTuner m_Tuner; - arm_compute::CLGEMMHeuristicsHandle m_HeuristicsHandle; -}; - } // namespace armnn diff --git a/src/backends/cl/ClImportTensorHandle.hpp b/src/backends/cl/ClImportTensorHandle.hpp index 889a2ad5f3..a03a4e9ea6 100644 --- a/src/backends/cl/ClImportTensorHandle.hpp +++ b/src/backends/cl/ClImportTensorHandle.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -19,7 +19,7 @@ #include <arm_compute/core/TensorShape.h> #include <arm_compute/core/Coordinates.h> -#include <cl/IClTensorHandle.hpp> +#include <aclCommon/IClTensorHandle.hpp> #include <CL/cl_ext.h> #include <arm_compute/core/CL/CLKernelLibrary.h> diff --git a/src/backends/cl/ClTensorHandle.hpp b/src/backends/cl/ClTensorHandle.hpp index f63f1faa07..3d750f9059 100644 --- a/src/backends/cl/ClTensorHandle.hpp +++ b/src/backends/cl/ClTensorHandle.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once @@ -18,7 +18,7 @@ #include <arm_compute/core/TensorShape.h> #include <arm_compute/core/Coordinates.h> -#include <cl/IClTensorHandle.hpp> +#include <aclCommon/IClTensorHandle.hpp> namespace armnn { diff --git a/src/backends/cl/IClTensorHandle.hpp b/src/backends/cl/IClTensorHandle.hpp deleted file mode 100644 index 48cf5f57d6..0000000000 --- a/src/backends/cl/IClTensorHandle.hpp +++ /dev/null @@ -1,22 +0,0 @@ -// -// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. -// SPDX-License-Identifier: MIT -// -#pragma once - -#include <arm_compute/core/CL/ICLTensor.h> -#include <arm_compute/runtime/MemoryGroup.h> - -namespace armnn -{ - -class IClTensorHandle : public IAclTensorHandle -{ -public: - virtual arm_compute::ICLTensor& GetTensor() = 0; - virtual arm_compute::ICLTensor const& GetTensor() const = 0; - virtual arm_compute::DataType GetDataType() const = 0; - virtual void SetMemoryGroup(const std::shared_ptr<arm_compute::IMemoryGroup>& memoryGroup) = 0; -}; - -} //namespace armnn
\ No newline at end of file diff --git a/src/backends/cl/test/CMakeLists.txt b/src/backends/cl/test/CMakeLists.txt index ec1d0a6c2f..6568d48ce5 100644 --- a/src/backends/cl/test/CMakeLists.txt +++ b/src/backends/cl/test/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright © 2017 Arm Ltd. All rights reserved. +# Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved. # SPDX-License-Identifier: MIT # @@ -8,6 +8,7 @@ list(APPEND armnnClBackendUnitTests_sources ClContextControlFixture.hpp ClContextSerializerTests.cpp ClCustomAllocatorTests.cpp + ClDefaultAllocatorTests.cpp ClCreateWorkloadTests.cpp ClEndToEndTests.cpp ClImportTensorHandleFactoryTests.cpp @@ -18,7 +19,6 @@ list(APPEND armnnClBackendUnitTests_sources ClOptimizedNetworkTests.cpp ClRuntimeTests.cpp ClWorkloadFactoryHelper.hpp - DefaultAllocatorTests.cpp Fp16SupportTest.cpp ICLTensorProxyTests.cpp OpenClTimerTest.cpp diff --git a/src/backends/cl/test/DefaultAllocatorTests.cpp b/src/backends/cl/test/ClDefaultAllocatorTests.cpp index eaa30c8800..411a480815 100644 --- a/src/backends/cl/test/DefaultAllocatorTests.cpp +++ b/src/backends/cl/test/ClDefaultAllocatorTests.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // |