IVGCVSW-6088 Add Sin and Log to ElementWiseUnary

* Ref workload
* Cl workload
* Neon workload
* Serializer
* Deserializer

* Remove boost include from TensorTest.cpp

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf

10 files changed, 197 insertions, 7 deletions

diff --git a/src/backends/cl/ClLayerSupport.cpp b/src/backends/cl/ClLayerSupport.cpp
index aa83826708..f9848ffd05 100644
--- a/src/backends/cl/ClLayerSupport.cpp
+++ b/src/backends/cl/ClLayerSupport.cpp
@@ -42,6 +42,7 @@
 #include "workloads/ClGatherWorkload.hpp"
 #include "workloads/ClInstanceNormalizationWorkload.hpp"
 #include "workloads/ClL2NormalizationFloatWorkload.hpp"
+#include "workloads/ClLogWorkload.hpp"
 #include "workloads/ClLogSoftmaxWorkload.hpp"
 #include "workloads/ClLogicalAndWorkload.hpp"
 #include "workloads/ClLogicalNotWorkload.hpp"
@@ -65,6 +66,7 @@
 #include "workloads/ClReshapeWorkload.hpp"
 #include "workloads/ClResizeWorkload.hpp"
 #include "workloads/ClRsqrtWorkload.hpp"
+#include "workloads/ClSinWorkload.hpp"
 #include "workloads/ClSliceWorkload.hpp"
 #include "workloads/ClSoftmaxWorkload.hpp"
 #include "workloads/ClSpaceToBatchNdWorkload.hpp"
@@ -465,6 +467,16 @@ bool ClLayerSupport::IsElementwiseUnarySupported(const TensorInfo& input,
                                            reasonIfUnsupported,
                                            input,
                                            output);
+        case UnaryOperation::Log:
+            FORWARD_WORKLOAD_VALIDATE_FUNC(ClLogWorkloadValidate,
+                                           reasonIfUnsupported,
+                                           input,
+                                           output);
+        case UnaryOperation::LogicalNot:
+            FORWARD_WORKLOAD_VALIDATE_FUNC(ClLogicalNotWorkloadValidate,
+                                           reasonIfUnsupported,
+                                           input,
+                                           output);
         case UnaryOperation::Neg:
             FORWARD_WORKLOAD_VALIDATE_FUNC(ClNegWorkloadValidate,
                                            reasonIfUnsupported,
@@ -475,8 +487,8 @@ bool ClLayerSupport::IsElementwiseUnarySupported(const TensorInfo& input,
                                            reasonIfUnsupported,
                                            input,
                                            output);
-        case UnaryOperation::LogicalNot:
-            FORWARD_WORKLOAD_VALIDATE_FUNC(ClLogicalNotWorkloadValidate,
+        case UnaryOperation::Sin:
+            FORWARD_WORKLOAD_VALIDATE_FUNC(ClSinWorkloadValidate,
                                            reasonIfUnsupported,
                                            input,
                                            output);
diff --git a/src/backends/cl/ClWorkloadFactory.cpp b/src/backends/cl/ClWorkloadFactory.cpp
index 0d8d0a7c28..6ca8c1b274 100644
--- a/src/backends/cl/ClWorkloadFactory.cpp
+++ b/src/backends/cl/ClWorkloadFactory.cpp
@@ -349,6 +349,10 @@ std::unique_ptr<IWorkload> ClWorkloadFactory::CreateElementwiseUnary(const Eleme
         }
         case UnaryOperation::Exp:
             return std::make_unique<ClExpWorkload>(descriptor, info, m_CLCompileContext);
+         case UnaryOperation::Log:
+            return std::make_unique<ClLogWorkload>(descriptor, info, m_CLCompileContext);
+        case UnaryOperation::LogicalNot:
+            return std::make_unique<ClLogicalNotWorkload>(descriptor, info, m_CLCompileContext);
         case UnaryOperation::Neg:
             return std::make_unique<ClNegWorkload>(descriptor, info, m_CLCompileContext);
         case UnaryOperation::Rsqrt:
@@ -359,8 +363,8 @@ std::unique_ptr<IWorkload> ClWorkloadFactory::CreateElementwiseUnary(const Eleme
 
             return std::make_unique<ClRsqrtWorkload>(rsqrtQueueDescriptor, info, m_CLCompileContext);
         }
-        case UnaryOperation::LogicalNot:
-            return std::make_unique<ClLogicalNotWorkload>(descriptor, info, m_CLCompileContext);
+        case UnaryOperation::Sin:
+            return std::make_unique<ClSinWorkload>(descriptor, info, m_CLCompileContext);
         default:
             return nullptr;
     }
diff --git a/src/backends/cl/backend.mk b/src/backends/cl/backend.mk
index e6c289cf39..16748cf72a 100644
--- a/src/backends/cl/backend.mk
+++ b/src/backends/cl/backend.mk
@@ -50,6 +50,7 @@ BACKEND_SOURCES := \
         workloads/ClGatherWorkload.cpp \
         workloads/ClInstanceNormalizationWorkload.cpp \
         workloads/ClL2NormalizationFloatWorkload.cpp \
+        workloads/ClLogWorkload.cpp \
         workloads/ClLogicalAndWorkload.cpp \
         workloads/ClLogicalNotWorkload.cpp \
         workloads/ClLogicalOrWorkload.cpp \
@@ -72,6 +73,7 @@ BACKEND_SOURCES := \
         workloads/ClReshapeWorkload.cpp \
         workloads/ClResizeWorkload.cpp \
         workloads/ClRsqrtWorkload.cpp \
+        workloads/ClSinWorkload.cpp \
         workloads/ClSliceWorkload.cpp \
         workloads/ClSoftmaxWorkload.cpp \
         workloads/ClSpaceToBatchNdWorkload.cpp \
diff --git a/src/backends/cl/test/ClLayerTests.cpp b/src/backends/cl/test/ClLayerTests.cpp
index 1c3c831810..f5b26d37f3 100644
--- a/src/backends/cl/test/ClLayerTests.cpp
+++ b/src/backends/cl/test/ClLayerTests.cpp
@@ -1847,12 +1847,28 @@ ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Neg3dFloat16, ClContextControlFixture, Neg3dTes
 
 // Exp
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Exp2d, ClContextControlFixture, Exp2dTest<DataType::Float32>)
-ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Exo3d, ClContextControlFixture, Exp3dTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Exp3d, ClContextControlFixture, Exp3dTest<DataType::Float32>)
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(ExpZero, ClContextControlFixture, ExpZeroTest<DataType::Float32>)
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(ExpNegative, ClContextControlFixture, ExpNegativeTest<DataType::Float32>)
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Exp2dFloat16, ClContextControlFixture, Exp2dTest<DataType::Float16>)
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Exp3dFloat16, ClContextControlFixture, Exp3dTest<DataType::Float16>)
 
+// Sin
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Sin2d, ClContextControlFixture, Sin2dTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Sin3d, ClContextControlFixture, Sin3dTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(SinZero, ClContextControlFixture, SinZeroTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(SinNegative, ClContextControlFixture, SinNegativeTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Sin2dFloat16, ClContextControlFixture, Sin2dTest<DataType::Float16>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Sin3dFloat16, ClContextControlFixture, Sin3dTest<DataType::Float16>)
+
+// Log
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Log2d, ClContextControlFixture, Log2dTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Log3d, ClContextControlFixture, Log3dTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(LogZero, ClContextControlFixture, LogZeroTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(LogNegative, ClContextControlFixture, LogNegativeTest<DataType::Float32>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Log2dFloat16, ClContextControlFixture, Log2dTest<DataType::Float16>)
+ARMNN_AUTO_TEST_FIXTURE_WITH_THF(Log3dFloat16, ClContextControlFixture, Log3dTest<DataType::Float16>)
+
 // Logical
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(LogicalNot, ClContextControlFixture, LogicalNotTest)
 ARMNN_AUTO_TEST_FIXTURE_WITH_THF(LogicalNotInt, ClContextControlFixture, LogicalNotIntTest)
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index 9f1a02f9bf..a351f73aa6 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -36,8 +36,8 @@ list(APPEND armnnClBackendWorkloads_sources
     ClDepthwiseConvolutionWorkload.hpp
     ClDequantizeWorkload.cpp
     ClDequantizeWorkload.hpp
-        ClDivisionWorkload.cpp
-        ClDivisionWorkload.hpp
+    ClDivisionWorkload.cpp
+    ClDivisionWorkload.hpp
     ClExpWorkload.cpp
     ClExpWorkload.hpp
     ClFillWorkload.cpp
@@ -50,6 +50,8 @@ list(APPEND armnnClBackendWorkloads_sources
     ClGatherWorkload.hpp
     ClInstanceNormalizationWorkload.cpp
     ClInstanceNormalizationWorkload.hpp
+    ClLogWorkload.cpp
+    ClLogWorkload.hpp
     ClL2NormalizationFloatWorkload.cpp
     ClL2NormalizationFloatWorkload.hpp
     ClLogicalAndWorkload.cpp
@@ -97,6 +99,8 @@ list(APPEND armnnClBackendWorkloads_sources
     ClResizeWorkload.hpp
     ClRsqrtWorkload.cpp
     ClRsqrtWorkload.hpp
+    ClSinWorkload.cpp
+    ClSinWorkload.hpp
     ClSliceWorkload.cpp
     ClSliceWorkload.hpp
     ClSoftmaxWorkload.cpp
diff --git a/src/backends/cl/workloads/ClLogWorkload.cpp b/src/backends/cl/workloads/ClLogWorkload.cpp
new file mode 100644
index 0000000000..b35345f1ce
--- /dev/null
+++ b/src/backends/cl/workloads/ClLogWorkload.cpp
@@ -0,0 +1,45 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClLogWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+#include <cl/ClTensorHandle.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::CLLogLayer::validate(&aclInput, &aclOutput);
+}
+
+ClLogWorkload::ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor,
+                             const WorkloadInfo& info,
+                             const arm_compute::CLCompileContext& clCompileContext)
+    : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("ClLogWorkload", 1, 1);
+
+    arm_compute::ICLTensor& input  = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ICLTensor& output = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_LogLayer.configure(clCompileContext, &input, &output);
+}
+
+void ClLogWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClLogWorkload_Execute");
+    RunClFunction(m_LogLayer, CHECK_LOCATION());
+}
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClLogWorkload.hpp b/src/backends/cl/workloads/ClLogWorkload.hpp
new file mode 100644
index 0000000000..4339ab786d
--- /dev/null
+++ b/src/backends/cl/workloads/ClLogWorkload.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class ClLogWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor>
+{
+public:
+    ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor,
+                  const WorkloadInfo& info,
+                  const arm_compute::CLCompileContext& clCompileContext);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::CLLogLayer m_LogLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClSinWorkload.cpp b/src/backends/cl/workloads/ClSinWorkload.cpp
new file mode 100644
index 0000000000..17572c657b
--- /dev/null
+++ b/src/backends/cl/workloads/ClSinWorkload.cpp
@@ -0,0 +1,45 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClSinWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+#include <cl/ClTensorHandle.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::CLSinLayer::validate(&aclInput, &aclOutput);
+}
+
+ClSinWorkload::ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor,
+                             const WorkloadInfo& info,
+                             const arm_compute::CLCompileContext& clCompileContext)
+    : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("ClSinWorkload", 1, 1);
+
+    arm_compute::ICLTensor& input  = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ICLTensor& output = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_SinLayer.configure(clCompileContext, &input, &output);
+}
+
+void ClSinWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClSinWorkload_Execute");
+    RunClFunction(m_SinLayer, CHECK_LOCATION());
+}
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClSinWorkload.hpp b/src/backends/cl/workloads/ClSinWorkload.hpp
new file mode 100644
index 0000000000..5eb3b45476
--- /dev/null
+++ b/src/backends/cl/workloads/ClSinWorkload.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class ClSinWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor>
+{
+public:
+    ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor,
+                  const WorkloadInfo& info,
+                  const arm_compute::CLCompileContext& clCompileContext);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::CLSinLayer m_SinLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index 5488fcdf1a..88d1c1ba93 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -25,6 +25,7 @@
 #include "ClGatherWorkload.hpp"
 #include "ClInstanceNormalizationWorkload.hpp"
 #include "ClL2NormalizationFloatWorkload.hpp"
+#include "ClLogWorkload.hpp"
 #include "ClLogicalAndWorkload.hpp"
 #include "ClLogicalNotWorkload.hpp"
 #include "ClLogicalOrWorkload.hpp"
@@ -49,6 +50,7 @@
 #include "ClReshapeWorkload.hpp"
 #include "ClResizeWorkload.hpp"
 #include "ClRsqrtWorkload.hpp"
+#include "ClSinWorkload.hpp"
 #include "ClSliceWorkload.hpp"
 #include "ClSoftmaxWorkload.hpp"
 #include "ClSpaceToBatchNdWorkload.hpp"