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author | Ryan OShea <ryan.oshea3@arm.com> | 2022-03-09 10:29:02 +0000 |
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committer | KeithARM <keith.davis@arm.com> | 2022-04-13 11:14:10 +0000 |
commit | bab8fa9a11cf3bfef4b72fb757b81575b6fd75f0 (patch) | |
tree | ddec7127c8683fb38dd595d8578c94e0479af7fe /src/backends/cl/workloads | |
parent | b8bf004911d635043e586198fa85e3f2a07542eb (diff) | |
download | armnn-bab8fa9a11cf3bfef4b72fb757b81575b6fd75f0.tar.gz |
IVGCVSW-6174 Add Cl Pooling3d Workload
* Add IsSupported for Pooling3d
* Add CreateWorkload case for Pooling3d
* Create new ClPooling3dWorkload header and source files
* Add Pooling3d workload to ClWorkloads.hpp
* Add tests for Pooling3d workload
* Add Pooling3d build function to ArmComputeTensorUtils
Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500
Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
Diffstat (limited to 'src/backends/cl/workloads')
-rw-r--r-- | src/backends/cl/workloads/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClPooling3dWorkload.cpp | 73 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClPooling3dWorkload.hpp | 34 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloads.hpp | 1 |
4 files changed, 110 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index 6bb8d68d07..52326ae4a9 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -86,6 +86,8 @@ list(APPEND armnnClBackendWorkloads_sources ClPermuteWorkload.hpp ClPooling2dWorkload.cpp ClPooling2dWorkload.hpp + ClPooling3dWorkload.cpp + ClPooling3dWorkload.hpp ClPreluWorkload.cpp ClPreluWorkload.hpp ClQLstmWorkload.cpp diff --git a/src/backends/cl/workloads/ClPooling3dWorkload.cpp b/src/backends/cl/workloads/ClPooling3dWorkload.cpp new file mode 100644 index 0000000000..a896110a2e --- /dev/null +++ b/src/backends/cl/workloads/ClPooling3dWorkload.cpp @@ -0,0 +1,73 @@ +// +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClPooling3dWorkload.hpp" +#include <cl/ClLayerSupport.hpp> +#include <cl/ClTensorHandle.hpp> +#include <aclCommon/ArmComputeUtils.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ + using namespace armcomputetensorutils; + + arm_compute::Status ClPooling3dWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const Pooling3dDescriptor& descriptor) + { + const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); + + arm_compute::Pooling3dLayerInfo layerInfo = BuildArmComputePooling3dLayerInfo(descriptor); + + return arm_compute::CLPooling3dLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo); + } + + ClPooling3dWorkload::ClPooling3dWorkload( const Pooling3dQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<Pooling3dQueueDescriptor>(descriptor, info) + { + // Report Profiling Details + ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPooling3dWorkload_Construct", + descriptor.m_Parameters, + info, + this->GetGuid()); + + m_Data.ValidateInputsOutputs("ClPooling3dWorkload", 1, 1); + + arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); + input.info()->set_data_layout(aclDataLayout); + output.info()->set_data_layout(aclDataLayout); + + // flag to use wider accumulators (32 bit instead of 16 for FP16) to improve accuracy + // enable fp_mixed_precision for the the FP16 cases that + // accumulation reaches a limit beyond which there is no more increment of the value + bool fpMixedPrecision = false; + + arm_compute::Pooling3dLayerInfo layerInfo = BuildArmComputePooling3dLayerInfo(m_Data.m_Parameters, + fpMixedPrecision); + + { + ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClPooling3dWorkload_configure"); + // Run the layer. + m_PoolingLayer.configure(clCompileContext, &input, &output, layerInfo); + } + } + + void ClPooling3dWorkload::Execute() const + { + ARMNN_SCOPED_PROFILING_EVENT_CL_GUID("ClPooling3dWorkload_Execute", this->GetGuid()); + RunClFunction(m_PoolingLayer, CHECK_LOCATION()); + } + +} + + diff --git a/src/backends/cl/workloads/ClPooling3dWorkload.hpp b/src/backends/cl/workloads/ClPooling3dWorkload.hpp new file mode 100644 index 0000000000..75777db188 --- /dev/null +++ b/src/backends/cl/workloads/ClPooling3dWorkload.hpp @@ -0,0 +1,34 @@ +// +// Copyright © 2022 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include "ClBaseWorkload.hpp" + +#include <arm_compute/runtime/CL/functions/CLPooling3dLayer.h> + +namespace armnn +{ + + arm_compute::Status ClPooling3dWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const Pooling3dDescriptor& descriptor); + + class ClPooling3dWorkload : public ClBaseWorkload<Pooling3dQueueDescriptor> + { + public: + using BaseWorkload<Pooling3dQueueDescriptor>::m_Data; + + ClPooling3dWorkload(const Pooling3dQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext); + + void Execute() const override; + + private: + mutable arm_compute::CLPooling3dLayer m_PoolingLayer; + }; + +} //namespace armnn diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index 3558da341e..27119bb2dc 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -43,6 +43,7 @@ #include "ClPermuteWorkload.hpp" #include "ClPadWorkload.hpp" #include "ClPooling2dWorkload.hpp" +#include "ClPooling3dWorkload.hpp" #include "ClPreluWorkload.hpp" #include "ClQLstmWorkload.hpp" #include "ClQuantizeWorkload.hpp" |