diff options
author | John Mcloughlin <john.mcloughlin@arm.com> | 2023-05-17 15:08:36 +0100 |
---|---|---|
committer | TeresaARM <teresa.charlinreyes@arm.com> | 2023-05-18 08:20:01 +0000 |
commit | 34c1c38944b47b881febdfb9f98103dbdc949ed0 (patch) | |
tree | 9de33ff04c7c98fb917026690406ba178110ca95 /src/backends/cl/workloads | |
parent | 0ec008761ab26110dcb108d544be4040a14fd403 (diff) | |
download | armnn-34c1c38944b47b881febdfb9f98103dbdc949ed0.tar.gz |
IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAcc
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
Diffstat (limited to 'src/backends/cl/workloads')
-rw-r--r-- | src/backends/cl/workloads/CMakeLists.txt | 4 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp | 94 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClElementwiseBinaryWorkload.hpp | 34 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloads.hpp | 3 |
4 files changed, 133 insertions, 2 deletions
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index 8616dec078..030d71988f 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +# Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. # SPDX-License-Identifier: MIT # @@ -44,6 +44,8 @@ list(APPEND armnnClBackendWorkloads_sources ClDequantizeWorkload.hpp ClDivisionWorkload.cpp ClDivisionWorkload.hpp + ClElementwiseBinaryWorkload.cpp + ClElementwiseBinaryWorkload.hpp ClExpWorkload.cpp ClExpWorkload.hpp ClFillWorkload.cpp diff --git a/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp new file mode 100644 index 0000000000..df30feb52a --- /dev/null +++ b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp @@ -0,0 +1,94 @@ +// +// Copyright © 2023 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClElementwiseBinaryWorkload.hpp" + +#include <cl/ClTensorHandle.hpp> +#include <armnn/backends/TensorHandle.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> +#include <aclCommon/ArmComputeUtils.hpp> + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +ClElementwiseBinaryWorkload::ClElementwiseBinaryWorkload(const ElementwiseBinaryQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<ElementwiseBinaryQueueDescriptor>(descriptor, info) +{ + this->m_Data.ValidateInputsOutputs("ClElementwiseBinaryWorkload", 2, 1); + + arm_compute::ICLTensor &input0 = static_cast<IClTensorHandle *>(this->m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor &input1 = static_cast<IClTensorHandle *>(this->m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ICLTensor &output = static_cast<IClTensorHandle *>(this->m_Data.m_Outputs[0])->GetTensor(); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertAdditionalInfoToAclActivationLayerInfo(descriptor); + { + ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClElementwiseBinaryWorkload_configure"); + + switch (descriptor.m_Parameters.m_Operation) + { + case armnn::BinaryOperation::Power: + { + auto powerLayer = std::make_unique<arm_compute::CLElementwisePower>(); + powerLayer->configure(clCompileContext, &input0, &input1, &output, activationInfo); + m_ElementwiseBinaryLayer.reset(powerLayer.release()); + break; + } + case armnn::BinaryOperation::SqDiff: + { + auto SqDiffLayer = std::make_unique<arm_compute::CLElementwiseSquaredDiff>(); + SqDiffLayer->configure(clCompileContext, &input0, &input1, &output, activationInfo); + m_ElementwiseBinaryLayer.reset(SqDiffLayer.release()); + break; + } + default: + throw InvalidArgumentException("Unknown binary operator", CHECK_LOCATION()); + } + } +} +void ClElementwiseBinaryWorkload::Execute() const +{ + if (m_ElementwiseBinaryLayer) + { + ARMNN_SCOPED_PROFILING_EVENT_CL_GUID("ClElementwiseBinaryWorkload_Execute", this->GetGuid()); + m_ElementwiseBinaryLayer->run(); + } +} + +arm_compute::Status ClElementwiseBinaryValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output, + const ElementwiseBinaryDescriptor& descriptor, + const ActivationDescriptor* activationDescriptor) +{ + const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo( + activationDescriptor); + + switch (descriptor.m_Operation) + { + case armnn::BinaryOperation::Power: + return arm_compute::CLElementwisePower::validate(&aclInput0Info, + &aclInput1Info, + &aclOutputInfo, + activationInfo); + case armnn::BinaryOperation::SqDiff: + return arm_compute::CLElementwiseSquaredDiff::validate(&aclInput0Info, + &aclInput1Info, + &aclOutputInfo, + activationInfo); + default: + throw InvalidArgumentException("Unknown binary operator", CHECK_LOCATION()); + } +} + +} //namespace armnn
\ No newline at end of file diff --git a/src/backends/cl/workloads/ClElementwiseBinaryWorkload.hpp b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.hpp new file mode 100644 index 0000000000..addd6e6085 --- /dev/null +++ b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.hpp @@ -0,0 +1,34 @@ +// +// Copyright © 2023 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include "ClBaseWorkload.hpp" + +#include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> + +namespace armnn +{ + +class ClElementwiseBinaryWorkload : public ClBaseWorkload<ElementwiseBinaryQueueDescriptor> +{ +public: + ClElementwiseBinaryWorkload(const ElementwiseBinaryQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext); + + void Execute() const override; + +private: + std::unique_ptr<arm_compute::IFunction> m_ElementwiseBinaryLayer; + +}; + +arm_compute::Status ClElementwiseBinaryValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output, + const ElementwiseBinaryDescriptor& descriptor, + const ActivationDescriptor* activationDescriptor = nullptr); +} //namespace armnn
\ No newline at end of file diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index 44f3798d7d..d862aab949 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017,2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,6 +21,7 @@ #include "ClDepthwiseConvolutionWorkload.hpp" #include "ClDequantizeWorkload.hpp" #include "ClDivisionWorkload.hpp" +#include "ClElementwiseBinaryWorkload.hpp" #include "ClExpWorkload.hpp" #include "ClFillWorkload.hpp" #include "ClFloorFloatWorkload.hpp" |