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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-04-01 16:51:23 +0100 |
|---|---|---|
| committer | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-04-06 09:06:01 +0100 |
| commit | ac2770a4bb6461bfbddec928bb6208f26f898f02 (patch) | |
| tree | c72f67f648b7aca2f4bccf69b05d185bf5f9ccad /src/backends/cl/workloads/ClWorkloadUtils.hpp | |
| parent | 7ee5d2c3b3cee5a924ed6347fef613ee07b5aca7 (diff) | |
| download | armnn-ac2770a4bb6461bfbddec928bb6208f26f898f02.tar.gz | |
IVGCVSW-4485 Remove Boost assert
* Change boost assert to armnn assert
* Change include file to armnn assert
* Fix ARMNN_ASSERT_MSG issue with multiple conditions
* Change BOOST_ASSERT to BOOST_TEST where appropriate
* Remove unused include statements
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I5d0fa3a37b7c1c921216de68f0073aa34702c9ff
Diffstat (limited to 'src/backends/cl/workloads/ClWorkloadUtils.hpp')
| -rw-r--r-- | src/backends/cl/workloads/ClWorkloadUtils.hpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp index b4bcc1c017..54e7717b7d 100644 --- a/src/backends/cl/workloads/ClWorkloadUtils.hpp +++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp @@ -90,7 +90,7 @@ inline auto SetClSliceData(const std::vector<unsigned int>& m_begin, inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor, const ConstCpuTensorHandle* handle) { - BOOST_ASSERT(handle); + ARMNN_ASSERT(handle); armcomputetensorutils::InitialiseArmComputeTensorEmpty(clTensor); switch(handle->GetTensorInfo().GetDataType()) @@ -116,7 +116,7 @@ inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor, CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<int32_t>()); break; default: - BOOST_ASSERT_MSG(false, "Unexpected tensor type."); + ARMNN_ASSERT_MSG(false, "Unexpected tensor type."); } }; |