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authorDavid Beck <david.beck@arm.com>2018-09-26 17:41:13 +0100
committerMatthew Bentham <matthew.bentham@arm.com>2018-10-10 16:16:57 +0100
commitac42efd972b7d03da17f057b2ceaaac5d6e96b1a (patch)
tree1ebc1320fa3ea7f494d3716ea79a2bda0f4ffd1e /src/backends/cl/workloads/ClPadWorkload.cpp
parentbcd3c85b5a7657b38f503676b88a80ae74165acd (diff)
downloadarmnn-ac42efd972b7d03da17f057b2ceaaac5d6e96b1a.tar.gz
IVGCVSW-1900 : CL backend folder structure
* moving backends/ClWorkloads to backends/cl * and moving pure Cl workload related code to backends/cl/workloads Change-Id: I019a3c6b4da5e7a23074bf03fb057e63199ad129
Diffstat (limited to 'src/backends/cl/workloads/ClPadWorkload.cpp')
-rw-r--r--src/backends/cl/workloads/ClPadWorkload.cpp63
1 files changed, 63 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/ClPadWorkload.cpp b/src/backends/cl/workloads/ClPadWorkload.cpp
new file mode 100644
index 0000000000..45dc5e8be7
--- /dev/null
+++ b/src/backends/cl/workloads/ClPadWorkload.cpp
@@ -0,0 +1,63 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClPadWorkload.hpp"
+
+#include <backends/cl/ClTensorHandle.hpp>
+#include <backends/aclCommon/ArmComputeTensorUtils.hpp>
+#include <arm_compute/core/Types.h>
+
+#include "ClWorkloadUtils.hpp"
+
+namespace armnn
+{
+using namespace armcomputetensorutils;
+
+template <armnn::DataType... T>
+ClPadWorkload<T...>::ClPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info)
+: TypedWorkload<PadQueueDescriptor, T...>(descriptor, info)
+{
+ this->m_Data.ValidateInputsOutputs("ClPadWorkload", 1, 1);
+
+ arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor();
+ arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(this->m_Data.m_Outputs[0])->GetTensor();
+ arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(descriptor.m_Parameters.m_PadList);
+
+ m_Layer.configure(&input, &output, padList);
+}
+
+template <armnn::DataType... T>
+void ClPadWorkload<T...>::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClPadWorkload_Execute");
+ m_Layer.run();
+}
+
+bool ClPadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const PadDescriptor& descriptor,
+ std::string* reasonIfUnsupported)
+{
+ const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
+ const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+ arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(descriptor.m_PadList);
+
+ const arm_compute::Status aclStatus = arm_compute::CLPadLayer::validate(&aclInputInfo,
+ &aclOutputInfo,
+ padList);
+
+ const bool supported = (aclStatus.error_code() == arm_compute::ErrorCode::OK);
+ if (!supported && reasonIfUnsupported)
+ {
+ *reasonIfUnsupported = aclStatus.error_description();
+ }
+
+ return supported;
+}
+
+} // namespace armnn
+
+template class armnn::ClPadWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
+template class armnn::ClPadWorkload<armnn::DataType::QuantisedAsymm8>;