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| author | nikraj01 <nikhil.raj@arm.com> | 2019-06-14 14:20:40 +0100 |
|---|---|---|
| committer | nikraj01 <nikhil.raj@arm.com> | 2019-06-14 14:20:40 +0100 |
| commit | 24d7321ad7897e8836d4a38039a73a0ec419cf43 (patch) | |
| tree | 9401dcc97d4843e66473b8fbf8d07c40c561750e /src/backends/backendsCommon/WorkloadData.cpp | |
| parent | c6138d8a8af334fad5230d73e456f303f9665bae (diff) | |
| download | armnn-24d7321ad7897e8836d4a38039a73a0ec419cf43.tar.gz | |
IVGCVSW-3225 Add QSymm16 support for Rsqrt workload
Change-Id: I83b8494af24ff271dc4cd609944a1c5c55c405e0
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Diffstat (limited to 'src/backends/backendsCommon/WorkloadData.cpp')
| -rw-r--r-- | src/backends/backendsCommon/WorkloadData.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/backends/backendsCommon/WorkloadData.cpp b/src/backends/backendsCommon/WorkloadData.cpp index 098e8575b1..a1d00c6945 100644 --- a/src/backends/backendsCommon/WorkloadData.cpp +++ b/src/backends/backendsCommon/WorkloadData.cpp @@ -1489,7 +1489,8 @@ void RsqrtQueueDescriptor::Validate(const WorkloadInfo& workloadInfo) const { DataType::Float16, DataType::Float32, - DataType::QuantisedAsymm8 + DataType::QuantisedAsymm8, + DataType::QuantisedSymm16 }; ValidateDataTypes(workloadInfo.m_InputTensorInfos[0], |