diff options
author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2021-10-22 17:15:00 +0100 |
---|---|---|
committer | TeresaARM <teresa.charlinreyes@arm.com> | 2021-10-27 09:32:11 +0000 |
commit | ec5f7d13582d1e477dc3473223b503388092a352 (patch) | |
tree | 37c4d6299f0726a853e28f6297d4eb222cda2c68 /src/backends/aclCommon | |
parent | e1fdd2866b0f403b5e80994890d62c2c038c16c9 (diff) | |
download | armnn-ec5f7d13582d1e477dc3473223b503388092a352.tar.gz |
IVGCVSW-6170 Add CpuAcc Conv3d Workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I3a5bfef5a0085d172fd3689e67f25af909ace2ee
Diffstat (limited to 'src/backends/aclCommon')
-rw-r--r-- | src/backends/aclCommon/ArmComputeTensorUtils.cpp | 6 | ||||
-rw-r--r-- | src/backends/aclCommon/ArmComputeTensorUtils.hpp | 3 | ||||
-rw-r--r-- | src/backends/aclCommon/ArmComputeUtils.hpp | 36 |
3 files changed, 42 insertions, 3 deletions
diff --git a/src/backends/aclCommon/ArmComputeTensorUtils.cpp b/src/backends/aclCommon/ArmComputeTensorUtils.cpp index 06309319f3..62f3263a0c 100644 --- a/src/backends/aclCommon/ArmComputeTensorUtils.cpp +++ b/src/backends/aclCommon/ArmComputeTensorUtils.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include <aclCommon/ArmComputeTensorUtils.hpp> @@ -143,6 +143,10 @@ arm_compute::DataLayout ConvertDataLayout(armnn::DataLayout dataLayout) case armnn::DataLayout::NCHW : return arm_compute::DataLayout::NCHW; + case armnn::DataLayout::NDHWC : return arm_compute::DataLayout::NDHWC; + + case armnn::DataLayout::NCDHW : return arm_compute::DataLayout::NCDHW; + default: throw InvalidArgumentException("Unknown armnn::DataLayout: [" + std::to_string(static_cast<int>(dataLayout)) + "]"); } diff --git a/src/backends/aclCommon/ArmComputeTensorUtils.hpp b/src/backends/aclCommon/ArmComputeTensorUtils.hpp index 011f44dc69..ad5d4614fe 100644 --- a/src/backends/aclCommon/ArmComputeTensorUtils.hpp +++ b/src/backends/aclCommon/ArmComputeTensorUtils.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once @@ -12,7 +12,6 @@ #include <arm_compute/core/ITensor.h> #include <arm_compute/core/TensorInfo.h> #include <arm_compute/core/Types.h> -#include <arm_compute/core/Size2D.h> #include <Half.hpp> diff --git a/src/backends/aclCommon/ArmComputeUtils.hpp b/src/backends/aclCommon/ArmComputeUtils.hpp index 059518acd6..2f767891a1 100644 --- a/src/backends/aclCommon/ArmComputeUtils.hpp +++ b/src/backends/aclCommon/ArmComputeUtils.hpp @@ -11,6 +11,7 @@ #include <backendsCommon/WorkloadData.hpp> #include <arm_compute/core/Types.h> +#include <arm_compute/runtime/FunctionDescriptors.h> #if defined(ARMCOMPUTENEON_ENABLED) #include "neon/workloads/NeonReduceWorkload.hpp" @@ -264,6 +265,41 @@ inline unsigned int ComputePositiveAxis(const int& axis, const armnn::TensorInfo return static_cast<unsigned int>(positiveAxis); } +/// Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor. +inline arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dDescriptor descriptor, + bool isFastMathEnabled, + const ActivationDescriptor* activationDescriptor) +{ + const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ}; + const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight, + descriptor.m_PadTop, descriptor.m_PadBottom, + descriptor.m_PadFront, descriptor.m_PadBack}; + const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ}; + + const arm_compute::ActivationLayerInfo activationInfo = + ConvertActivationDescriptorToAclActivationLayerInfo(activationDescriptor); + const auto roundType = arm_compute::DimensionRoundingType::FLOOR; + + return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled}; +} + +inline arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dQueueDescriptor queueDescriptor, + bool isFastMathEnabled) +{ + auto descriptor = queueDescriptor.m_Parameters; + const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ}; + const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight, + descriptor.m_PadTop, descriptor.m_PadBottom, + descriptor.m_PadFront, descriptor.m_PadBack}; + const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ}; + + const arm_compute::ActivationLayerInfo activationInfo = + ConvertAdditionalInfoToAclActivationLayerInfo(queueDescriptor); + const auto roundType = arm_compute::DimensionRoundingType::FLOOR; + + return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled}; +} + inline arm_compute::ReductionOperation ConvertReductionOperationToAcl(const ReduceDescriptor& descriptor) { switch (descriptor.m_ReduceOperation) |