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| author | Nikhil Raj <nikhil.raj@arm.com> | 2018-10-12 13:51:57 +0100 |
|---|---|---|
| committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-10-22 16:57:53 +0100 |
| commit | cec6b655d9f6ddb73c721ca47a7d67eeaad5c043 (patch) | |
| tree | 898dbc90785f77f9c724bb8de61d7fb1b1ce3c0b /src/backends/WorkloadData.hpp | |
| parent | f3eb46d23c6001150d36d80acac7ad1247174630 (diff) | |
| download | armnn-cec6b655d9f6ddb73c721ca47a7d67eeaad5c043.tar.gz | |
IVGCVSW-1922 Unit test for DepthwiseConvolution with NHWC
Change-Id: I3e6e5b9a62f30d03c05bd7178adea8f4c8275da8
Diffstat (limited to 'src/backends/WorkloadData.hpp')
| -rw-r--r-- | src/backends/WorkloadData.hpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/backends/WorkloadData.hpp b/src/backends/WorkloadData.hpp index c7777b0eed..40e89f76e4 100644 --- a/src/backends/WorkloadData.hpp +++ b/src/backends/WorkloadData.hpp @@ -160,13 +160,11 @@ struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<Dep DepthwiseConvolution2dQueueDescriptor() : m_Weight(nullptr) , m_Bias(nullptr) - , m_DataLayout(DataLayout::NCHW) { } const ConstCpuTensorHandle* m_Weight; const ConstCpuTensorHandle* m_Bias; - DataLayout m_DataLayout; void Validate(const WorkloadInfo& workloadInfo) const; }; |