diff options
author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-08-14 11:51:12 +0100 |
---|---|---|
committer | Jim Flynn <jim.flynn@arm.com> | 2020-08-16 14:47:00 +0000 |
commit | b8d771ac2e6f847a64b3b203591c5b1c3e198d3a (patch) | |
tree | 289b769e179e495e45f2d2c2f9374703be32f9c2 /src/armnn | |
parent | 9e132f57e3fc9d1cd12e3bca2dd3eb82549d7d84 (diff) | |
download | armnn-b8d771ac2e6f847a64b3b203591c5b1c3e198d3a.tar.gz |
IVGCVSW-5012 Enable zero copy for Neon
* Allow memory import if padding is not required in Neon
* AddMockImportBackend for fallback tests
* Refactor GraphUtils
* Memory import unit tests
* Fallback unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic2e141e12774bf6d915e77745b6f6d2d83d9b82d
Diffstat (limited to 'src/armnn')
-rw-r--r-- | src/armnn/LoadedNetwork.cpp | 1 | ||||
-rw-r--r-- | src/armnn/Network.cpp | 10 | ||||
-rw-r--r-- | src/armnn/test/GraphTests.cpp | 13 | ||||
-rw-r--r-- | src/armnn/test/GraphUtils.cpp | 13 | ||||
-rw-r--r-- | src/armnn/test/GraphUtils.hpp | 2 |
5 files changed, 25 insertions, 14 deletions
diff --git a/src/armnn/LoadedNetwork.cpp b/src/armnn/LoadedNetwork.cpp index 593539d3ee..4a293b92d9 100644 --- a/src/armnn/LoadedNetwork.cpp +++ b/src/armnn/LoadedNetwork.cpp @@ -168,6 +168,7 @@ LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, switch (layer->GetType()) { case LayerType::Input: + case LayerType::MemImport: { // If IsImportEnabled is true then we need to set IsMemoryManaged to false when creating TensorHandles layer->CreateTensorHandles(m_TensorHandleFactoryRegistry, workloadFactory, !m_IsImportEnabled); diff --git a/src/armnn/Network.cpp b/src/armnn/Network.cpp index 132924a19a..94a9961a81 100644 --- a/src/armnn/Network.cpp +++ b/src/armnn/Network.cpp @@ -912,7 +912,15 @@ EdgeStrategy CalculateEdgeStrategy(BackendsMap& backends, if ((dstFactory->GetImportFlags() & srcFactory->GetExportFlags()) != 0) { - return EdgeStrategy::ExportToTarget; + auto srcCapability = srcFactory->GetCapabilities(&layer, &layer, CapabilityClass::PaddingRequired); + auto dstCapability = dstFactory->GetCapabilities(&connectedLayer, + &connectedLayer, + CapabilityClass::PaddingRequired); + // Do not require memory copy if the source and destination do not require padding. + if (srcCapability.empty() && dstCapability.empty()) + { + return EdgeStrategy::ExportToTarget; + } } } } diff --git a/src/armnn/test/GraphTests.cpp b/src/armnn/test/GraphTests.cpp index a3c42b6ce7..5a17c1c227 100644 --- a/src/armnn/test/GraphTests.cpp +++ b/src/armnn/test/GraphTests.cpp @@ -19,19 +19,6 @@ #include <boost/cast.hpp> #include <boost/test/unit_test.hpp> -/// Checks that first comes before second in the order. -bool CheckOrder(const armnn::Graph& graph, const armnn::Layer* first, const armnn::Layer* second) -{ - graph.Print(); - - const auto& order = graph.TopologicalSort(); - - auto firstPos = std::find(order.begin(), order.end(), first); - auto secondPos = std::find(firstPos, order.end(), second); - - return (secondPos != order.end()); -} - BOOST_AUTO_TEST_SUITE(Graph) BOOST_AUTO_TEST_CASE(ClassGraph) diff --git a/src/armnn/test/GraphUtils.cpp b/src/armnn/test/GraphUtils.cpp index 36db900a2d..bc6b562c9d 100644 --- a/src/armnn/test/GraphUtils.cpp +++ b/src/armnn/test/GraphUtils.cpp @@ -63,3 +63,16 @@ bool IsConnected(armnn::Layer* srcLayer, armnn::Layer* destLayer, } return false; } + +/// Checks that first comes before second in the order. +bool CheckOrder(const armnn::Graph& graph, const armnn::Layer* first, const armnn::Layer* second) +{ + graph.Print(); + + const auto& order = graph.TopologicalSort(); + + auto firstPos = std::find(order.begin(), order.end(), first); + auto secondPos = std::find(firstPos, order.end(), second); + + return (secondPos != order.end()); +} diff --git a/src/armnn/test/GraphUtils.hpp b/src/armnn/test/GraphUtils.hpp index b51e4d179e..60d03dca23 100644 --- a/src/armnn/test/GraphUtils.hpp +++ b/src/armnn/test/GraphUtils.hpp @@ -21,3 +21,5 @@ bool IsConnected(armnn::Layer* srcLayer, armnn::Layer* destLayer, unsigned int srcSlot, unsigned int destSlot, const armnn::TensorInfo& expectedTensorInfo); +bool CheckOrder(const armnn::Graph& graph, const armnn::Layer* first, const armnn::Layer* second); + |